Issued Patents All Time
Showing 101–125 of 216 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6953983 | Low dielectric constant STI with SOI devices | — | 2005-10-11 |
| 6953706 | Method of providing a semiconductor package having an internal heat-activated hydrogen source | Jerome M. Eldridge | 2005-10-11 |
| 6949839 | Aligned buried structures formed by surface transformation of empty spaces in solid state materials | Joseph E. Geusic | 2005-09-27 |
| 6946389 | Method of forming buried conductors | Wendell P. Noble | 2005-09-20 |
| 6943090 | Aluminum-beryllium alloys for air bridges | — | 2005-09-13 |
| 6909171 | Microelectronic device package filled with liquid or pressurized gas and associated method of manufacture | Jerome M. Eldridge | 2005-06-21 |
| 6906408 | Assemblies and packages including die-to-die connections | Eugene H. Cloud | 2005-06-14 |
| 6903001 | Techniques to create low K ILD for BEOL | Arup Bhattacharyya | 2005-06-07 |
| 6890847 | Polynorbornene foam insulation for integrated circuits | — | 2005-05-10 |
| 6888232 | Semiconductor package having a heat-activated source of releasable hydrogen | Jerome M. Eldridge | 2005-05-03 |
| 6879017 | Methods and structures for metal interconnections in integrated circuits | Kie Y. Ahn, Leonard Forbes | 2005-04-12 |
| 6878396 | Micro C-4 semiconductor die and method for depositing connection sites thereon | Jerome M. Eldridge | 2005-04-12 |
| 6872671 | Insulators for high density circuits | — | 2005-03-29 |
| 6861287 | Multiple chip stack structure and cooling system | Jerome M. Eldridge | 2005-03-01 |
| 6849927 | Forming submicron integrated-circuit wiring from gold, silver, copper, and other metals | — | 2005-02-01 |
| 6844253 | Selective deposition of solder ball contacts | — | 2005-01-18 |
| 6841408 | Method of alignment for buried structures formed by surface transformation of empty spaces in solid state materials | Joseph E. Geusic | 2005-01-11 |
| 6838764 | Insulators for high density circuits | — | 2005-01-04 |
| 6831370 | Method of using foamed insulators in three dimensional multichip structures | — | 2004-12-14 |
| 6815826 | Alignment for buried structures formed by surface transformation of empty spaces in solid state materials | Joseph E. Geusic | 2004-11-09 |
| 6812571 | Low capacitance wiring layout and method for making same | — | 2004-11-02 |
| 6790702 | Three-dimensional multichip module | — | 2004-09-14 |
| 6784550 | Thermal processing of metal alloys for an improved CMP process in integrated circuit fabrication | John H. Givens | 2004-08-31 |
| 6780721 | Low dielectric constant shallow trench isolation | — | 2004-08-24 |
| 6781192 | Low dielectric constant shallow trench isolation | — | 2004-08-24 |