Issued Patents All Time
Showing 26–50 of 93 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11894103 | Decoding architecture for word line tiles | Lorenzo Fratin, Fabio Pellizzer, Enrico Varesi | 2024-02-06 |
| 11877457 | Vertical 3D memory device and accessing method | Corrado Villa, Stefan Frederik Schippers, Efrem Bolandrina | 2024-01-16 |
| 11869577 | Decoding architecture for memory devices | Enrico Varesi, Lorenzo Fratin, Fabio Pellizzer | 2024-01-09 |
| 11864475 | Memory device with laterally formed memory cells | Thomas M. Graettinger, Lorenzo Fratin, Patrick M. Flynn, Enrico Varesi | 2024-01-02 |
| 11825754 | Memory cells with sidewall and bulk regions in planar structures | Lorenzo Fratin, Enrico Varesi | 2023-11-21 |
| 11818902 | Vertical 3D memory device and method for manufacturing the same | Corrado Villa, Paolo Tessariol | 2023-11-14 |
| 11804252 | Word line structures for three-dimensional memory arrays | Stephen W. Russell, Lorenzo Fratin, Enrico Varesi | 2023-10-31 |
| 11804264 | Decoding architecture for memory tiles | Andrea Martinelli, Claudio Nava | 2023-10-31 |
| 11790987 | Decoding for a memory device | Lorenzo Fratin, Fabio Pellizzer, Thomas M. Graettinger | 2023-10-17 |
| 11763886 | Techniques to access a self-selecting memory device | Innocenzo Tortorelli, Andrea Redaelli, Agostino Pirovano, Fabio Pellizzer, Mario Allegra | 2023-09-19 |
| 11735255 | Voltage equalization for pillars of a memory array | Corrado Villa, Ferdinando Bedeschi | 2023-08-22 |
| 11593624 | Self select memory cell based artificial synapse | — | 2023-02-28 |
| 11587606 | Decoding architecture for memory devices | Enrico Varesi, Lorenzo Fratin, Fabio Pellizzer | 2023-02-21 |
| 11475947 | Decoding architecture for memory tiles | Andrea Martinelli, Claudio Nava | 2022-10-18 |
| 11437097 | Voltage equalization for pillars of a memory array | Corrado Villa, Ferdinando Bedeschi | 2022-09-06 |
| 11423981 | Decoding for a memory device | Lorenzo Fratin, Fabio Pellizzer | 2022-08-23 |
| 11417394 | Decoding for a memory device | Lorenzo Fratin, Fabio Pellizzer, Thomas M. Graettinger | 2022-08-16 |
| 11361801 | Sub-threshold voltage leakage current tracking | Paolo Amato, Marco Sforzin | 2022-06-14 |
| 11282895 | Split pillar architectures for memory devices | Fabio Pellizzer, Lorenzo Fratin | 2022-03-22 |
| 11244855 | Architecture of three-dimensional memory device and methods regarding the same | Lorenzo Fratin, Enrico Varesi | 2022-02-08 |
| 11195579 | Apparatuses and methods for accessing variable resistance memory device | Daniele Ielmini, Nicola Ciocchini | 2021-12-07 |
| 11158673 | Vertical 3D memory device and method for manufacturing the same | Corrado Villa, Paolo Tessariol | 2021-10-26 |
| 11152065 | Techniques to access a self-selecting memory device | Innocenzo Tortorelli, Andrea Redaelli, Agostino Pirovano, Fabio Pellizzer, Mario Allegra | 2021-10-19 |
| 11152427 | Chalcogenide memory device components and composition | F. Daniel Gealy, Enrico Varesi, Swapnil Lengade | 2021-10-19 |
| 11121180 | Three-dimensional memory array | Lorenzo Fratin | 2021-09-14 |