Issued Patents All Time
Showing 901–925 of 1,109 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6476434 | 4 F2 folded bit line dram cell structure having buried bit and word lines | Wendell P. Noble, Kie Y. Ahn | 2002-11-05 |
| 6476441 | Method and structure for textured surfaces in floating gate tunneling oxide devices | Joseph E. Geusic | 2002-11-05 |
| 6472939 | Low power supply CMOS differential amplifier topology | — | 2002-10-29 |
| 6469582 | Voltage tunable active inductorless filter | — | 2002-10-22 |
| 6465375 | Single electron MOSFET memory device and method | Kie Y. Ahn | 2002-10-15 |
| 6465298 | Method of fabricating a semiconductor-on-insulator memory cell with buried word and body lines | Kie Y. Ahn | 2002-10-15 |
| 6462582 | Clocked pass transistor and complementary pass transistor logic circuits | — | 2002-10-08 |
| 6454912 | Method and apparatus for the fabrication of ferroelectric films | Kie Y. Ahn | 2002-09-24 |
| 6456157 | Threshold voltage compensation circuits for low voltage and low power CMOS integrated circuits | Kie Y. Ahn | 2002-09-24 |
| 6456535 | Dynamic flash memory cells with ultra thin tunnel oxides | Luan C. Tran, Alan R. Reinberg, Joseph E. Geusic, Kie Y. Ahn, Paul A. Farrar +2 more | 2002-09-24 |
| 6452831 | Single electron resistor memory device and method | Kie Y. Ahn | 2002-09-17 |
| 6452839 | Method for erasing data from a single electron resistor memory | Kie Y. Ahn | 2002-09-17 |
| 6452856 | DRAM technology compatible processor/memory chips | Eugene H. Cloud, Wendell P. Noble | 2002-09-17 |
| 6448615 | Methods, structures, and circuits for transistors with gate-to-body capacitive coupling | Wendell P. Noble | 2002-09-10 |
| 6448601 | Memory address and decode circuits with ultra thin body transistors | Kie Y. Ahn | 2002-09-10 |
| 6446327 | Integrated circuit inductors | Kie Y. Ahn | 2002-09-10 |
| 6441479 | System-on-a-chip with multi-layered metallized through-hole interconnection | Kie Y. Ahn | 2002-08-27 |
| 6437389 | Vertical gate transistors in pass transistor programmable logic arrays | Kie Y. Ahn | 2002-08-20 |
| 6436748 | Method for fabricating CMOS transistors having matching characteristics and apparatus formed thereby | Wendell P. Noble | 2002-08-20 |
| 6437604 | Clocked differential cascode voltage switch with pass gate logic | — | 2002-08-20 |
| 6432724 | Buried ground plane for high performance system modules | Kie Y. Ahn | 2002-08-13 |
| 6434041 | Circuits and methods for a memory cell with a trench plate trench capacitor and a vertical bipolar read device | — | 2002-08-13 |
| 6429120 | Methods and apparatus for making integrated-circuit wiring from copper, silver, gold, and other metals | Kie Y. Ahn | 2002-08-06 |
| 6429065 | Circuits and methods for a memory cell with a trench plate trench capacitor and a vertical bipolar read device | — | 2002-08-06 |
| 6429632 | Efficient CMOS DC-DC converters based on switched capacitor power supplies with inductive current limiters | Kie Y. Ahn | 2002-08-06 |