Issued Patents All Time
Showing 876–900 of 1,109 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6531727 | Open bit line DRAM with ultra thin body transistors | Kie Y. Ahn | 2003-03-11 |
| 6528837 | Circuit and method for an open bit line memory cell with a vertical transistor and trench plate trench capacitor | Wendell P. Noble | 2003-03-04 |
| 6526191 | Integrated circuits using optical fiber interconnects formed through a semiconductor wafer and methods for forming same | Joseph E. Geusic, Kie Y. Ahn | 2003-02-25 |
| 6521958 | MOSFET technology for programmable address decode and correction | Wendell P. Noble, Eugene H. Cloud | 2003-02-18 |
| 6519197 | Sense amplifier with improved read access | — | 2003-02-11 |
| 6518615 | Method and structure for high capacitance memory cells | Joseph E. Geusic, Kie Y. Ahn | 2003-02-11 |
| 6514828 | Method of fabricating a highly reliable gate oxide | Kie Y. Ahn | 2003-02-04 |
| 6515510 | Programmable logic array with vertical transistors | Wendell P. Noble | 2003-02-04 |
| 6514820 | Method for forming single electron resistor memory | Kie Y. Ahn | 2003-02-04 |
| 6512400 | Integrated circuit comparator or amplifier | — | 2003-01-28 |
| 6512695 | Field programmable logic arrays with transistors with vertical gates | Kie Y. Ahn | 2003-01-28 |
| 6504201 | Memory cell having a vertical transistor with buried source/drain and dual gates | Wendell P. Noble, Kie Y. Ahn | 2003-01-07 |
| 6504224 | Methods and structures for metal interconnections in integrated circuits | Kie Y. Ahn, Paul A. Farrar | 2003-01-07 |
| 6503790 | High density vertical SRAM cell using bipolar latchup induced by gated diode breakdown | Wendell P. Noble | 2003-01-07 |
| 6498362 | Weak ferroelectric transistor | Kie Y. Ahn | 2002-12-24 |
| 6498065 | Memory address decode array with vertical transistors | Wendell P. Noble | 2002-12-24 |
| 6495955 | Structure and method for improved field emitter arrays | Kie Y. Ahn | 2002-12-17 |
| 6495436 | Formation of metal oxide gate dielectric | Kie Y. Ahn | 2002-12-17 |
| 6496370 | Structure and method for an electronic assembly | Joseph E. Geusic, Kie Y. Ahn | 2002-12-17 |
| 6496034 | Programmable logic arrays with ultra thin body transistors | Kie Y. Ahn | 2002-12-17 |
| 6492233 | Memory cell with vertical transistor and buried word and body lines | Wendell P. Noble, Kie Y. Ahn | 2002-12-10 |
| 6492694 | Highly conductive composite polysilicon gate for CMOS integrated circuits | Wendell P. Noble | 2002-12-10 |
| 6486703 | Programmable logic array with vertical transistors | Wendell P. Noble | 2002-11-26 |
| 6486027 | Field programmable logic arrays with vertical transistors | Wendell P. Noble | 2002-11-26 |
| 6483171 | Vertical sub-micron CMOS transistors on (110), (111), (311), (511), and higher order surfaces of bulk, SOI and thin film structures and method of forming same | Wendell P. Noble, Alan R. Reinberg | 2002-11-19 |