Issued Patents All Time
Showing 926–950 of 1,109 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6424034 | High performance packaging for microprocessors and DRAM chips which minimizes timing skews | Kie Y. Ahn, Paul A. Farrar | 2002-07-23 |
| 6423629 | Multilevel copper interconnects with low-k dielectrics and air gaps | Kie Y. Ahn | 2002-07-23 |
| 6424001 | Flash memory with ultra thin vertical body transistors | Kie Y. Ahn | 2002-07-23 |
| 6420902 | Field programmable logic arrays with transistors with vertical gates | Kie Y. Ahn | 2002-07-16 |
| 6420742 | Ferroelectric memory transistor with high-k gate insulator and method of fabrication | Kie Y. Ahn | 2002-07-16 |
| 6420954 | Coupled multilayer soft magnetic films for high frequency microtransformer for system-on-chip power supply | Kie Y. Ahn | 2002-07-16 |
| 6418050 | Circuits and methods for a memory cell with a trench plate trench capacitor and a vertical bipolar read device | — | 2002-07-09 |
| 6414356 | Circuits and methods for dual-gated transistors | Wendell P. Noble | 2002-07-02 |
| 6414550 | CMOS linear amplifier formed with nonlinear transistors | — | 2002-07-02 |
| 6413825 | Method for signal processing | — | 2002-07-02 |
| 6407426 | Single electron resistor memory device and method | Kie Y. Ahn | 2002-06-18 |
| 6407424 | Flash memory with nanocrystalline silicon film floating gate | — | 2002-06-18 |
| 6399979 | Memory cell having a vertical transistor with buried source/drain and dual gates | Wendell P. Noble, Kie Y. Ahn | 2002-06-04 |
| 6395630 | Stacked integrated circuits | Kie Y. Ahn | 2002-05-28 |
| 6392296 | Silicon interposer with optical connections | Kie Y. Ahn | 2002-05-21 |
| 6384448 | P-channel dynamic flash memory cells with ultrathin tunnel oxides | — | 2002-05-07 |
| 6383871 | Method of forming multiple oxide thicknesses for merged memory and logic applications | Wendell P. Noble | 2002-05-07 |
| 6379982 | Wafer on wafer packaging and method of fabrication for full-wafer burn-in and testing | Kie Y. Ahn | 2002-04-30 |
| 6381168 | Circuits and methods for a memory cell with a trench plate trench capacitor and a vertical bipolar read device | — | 2002-04-30 |
| 6380787 | Integrated circuit and method for minimizing clock skews | — | 2002-04-30 |
| 6380765 | Double pass transistor logic with vertical gate transistors | Kie Y. Ahn | 2002-04-30 |
| 6376895 | High-Q inductive elements | Paul A. Farrar | 2002-04-23 |
| 6376317 | Methods for dual-gated transistors | Wendell P. Noble | 2002-04-23 |
| 6376909 | Mixed-mode stacked integrated circuit with power supply circuit part of the stack | Kie Y. Ahn | 2002-04-23 |
| 6377070 | In-service programmable logic arrays with ultra thin vertical body transistors | — | 2002-04-23 |