Patent Leaderboard
USPTO Patent Rankings Data through Sept 30, 2025
KP

Kunal R. Parekh — 284 Patents

Micron: 272 patents #18 of 6,345Top 1%
AIAptina Imaging: 2 patents #130 of 332Top 40%
LGLodestar Licensing Group: 1 patents #26 of 80Top 35%
Boise, ID: #10 of 3,546 inventorsTop 1%
Idaho: #14 of 8,810 inventorsTop 1%
Overall (All Time): #1,500 of 4,157,543Top 1%
284 Patents All Time

Issued Patents All Time

Showing 151–175 of 284 patents

Patent #TitleCo-InventorsDate
7601591 Method of manufacturing sidewall spacers on a memory device, and device comprising same David K. Hwang, Michael Willett, Jigish Trivedi, Suraj Mathew, Greg Peterson 2009-10-13
7557048 Methods of forming semiconductor constructions Chandra Mouli, M. Ceredig Roberts, Fernando Gonzalez 2009-07-07
7544554 Methods of forming gatelines and transistor devices H. Montgomery Manning 2009-06-09
7544533 Method and apparatus for providing an integrated circuit having p and n doped gates Chandra Mouli 2009-06-09
7470590 Methods of forming semiconductor constructions Werner Juengling, Steven M. McDonald 2008-12-30
7462534 Methods of forming memory circuitry Suraj Mathew, Steve V. Cole 2008-12-09
7459742 Method of manufacturing sidewall spacers on a memory device, and device comprising same David K. Hwang, Michael Willett, Jigish Trivedi, Suraj Mathew, Greg Peterson 2008-12-02
7456928 Systems and methods for controlling ambient pressure during processing of microfeature workpieces, including during immersion lithography 2008-11-25
7442977 Gated field effect devices Cem Basceri, H. Montgomery Manning, Gurtej S. Sandhu 2008-10-28
7439138 Method of forming integrated circuitry John K. Zahurak 2008-10-21
7419865 Methods of forming memory circuitry Byron Neville Burgess 2008-09-02
7411255 Dopant barrier for doped glass in memory devices Gurtej S. Sandhu 2008-08-12
7384849 Methods of forming recessed access devices associated with semiconductor constructions Suraj Mathew, Jigish Trivedi, John K. Zahurak, Sanh D. Tang 2008-06-10
7378704 Semiconductor constructions, and methods of forming semiconductor constructions 2008-05-27
7358568 Low resistance semiconductor process and structures Michael Hermes 2008-04-15
7341906 Method of manufacturing sidewall spacers on a memory device, and device comprising same David K. Hwang, Michael Willett, Jigish Trivedi, Suraj Mathew, Greg Peterson 2008-03-11
7315074 Use of DAR coating to modulate the efficiency of laser fuse blows Mark Fischer, Zhiping Yin, Thomas R. Glass, Gurtej S. Sandhu 2008-01-01
7306991 Stepped gate configuration for non-volatile memory H. Montgomery Manning 2007-12-11
7276433 Methods of forming integrated circuitry, methods of forming memory circuitry, and methods of forming field effect transistors John K. Zahurak 2007-10-02
7268384 Semiconductor substrate having first and second pairs of word lines Byron Neville Burgess 2007-09-11
7265016 Stepped gate configuration for non-volatile memory H. Montgomery Manning 2007-09-04
7205600 Capacitor constructions with a barrier layer to threshold voltage shift inducing material Vishnu K. Agarwal, F. Daniel Gealy, Randhir P. S. Thakur 2007-04-17
7189662 Methods of forming semiconductor constructions Chandra Mouli, M. Ceredig Roberts, Fernando Gonzalez 2007-03-13
7161203 Gated field effect device comprising gate dielectric having different K regions Cem Basceri, H. Montgomery Manning, Gurtej S. Sandhu 2007-01-09
7161857 Memory redundancy programming 2007-01-09