Issued Patents All Time
Showing 101–125 of 284 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9666801 | Methods of forming a non-volatile resistive oxide memory cell and methods of forming a non-volatile resistive oxide memory array | Nishant Sinha, John Smythe, Bhaskar Srinivasan, Gurtej S. Sandhu, Joseph Neil Greeley | 2017-05-30 |
| 9627611 | Methods for forming narrow vertical pillars and integrated circuit devices having the same | Jun Liu | 2017-04-18 |
| 9553262 | Arrays of memory cells and methods of forming an array of memory cells | Jun Liu | 2017-01-24 |
| 9514975 | Semiconductor with through-substrate interconnect | Kyle K. Kirby | 2016-12-06 |
| 9508628 | Semiconductor substrates with unitary vias and via terminals, and associated systems and methods | Kyle K. Kirby | 2016-11-29 |
| 9502516 | Recessed access devices and gate electrodes | Jasper S. Gibbons, Darren Young, Casey Joe Smith | 2016-11-22 |
| 9449906 | Devices, systems, and methods related to forming through-substrate vias with sacrificial plugs | Kyle K. Kirby | 2016-09-20 |
| 9356145 | Electronic device with asymmetric gate strain | Gurtej S. Sandhu | 2016-05-31 |
| 9343665 | Methods of forming a non-volatile resistive oxide memory cell and methods of forming a non-volatile resistive oxide memory array | Nishant Sinha, John Smythe, Bhaskar Srinivasan, Gurtej S. Sandhu, Joseph Neil Greeley | 2016-05-17 |
| 9343362 | Microelectronic devices with through-silicon vias and associated methods of manufacturing | Kyle K. Kirby, Philip J. Ireland, Sarah A. Niroumand | 2016-05-17 |
| 9263095 | Memory having buried digit lines and methods of making the same | David K. Hwang, Wen-Kuei Huang, Kuo-Chen Wang, Ching-Kai Lin | 2016-02-16 |
| 9171902 | Semiconductor structures comprising a plurality of active areas separated by isolation regions | John K. Zahurak | 2015-10-27 |
| 9099457 | Semiconductor with through-substrate interconnect | Kyle K. Kirby | 2015-08-04 |
| 8907457 | Microelectronic devices with through-substrate interconnects and associated methods of manufacturing | Kyle K. Kirby, Sarah A. Niroumand | 2014-12-09 |
| 8901700 | Semiconductor structures | John K. Zahurak | 2014-12-02 |
| 8877628 | Methods of forming nano-scale pores, nano-scale electrical contacts, and memory devices including nano-scale electrical contacts, and related structures and devices | Jun Liu | 2014-11-04 |
| 8860174 | Recessed antifuse structures and methods of making the same | Casey Joe Smith, Jasper S. Gibbons | 2014-10-14 |
| 8859425 | Devices, systems, and methods related to forming through-substrate vias with sacrificial plugs | Kyle K. Kirby | 2014-10-14 |
| 8803240 | Electronic device with asymmetric gate strain | Gurtej S. Sandhu | 2014-08-12 |
| 8753981 | Microelectronic devices with through-silicon vias and associated methods of manufacturing | Kyle K. Kirby, Philip J. Ireland, Sarah A. Niroumand | 2014-06-17 |
| 8716116 | Method of forming a DRAM array of devices with vertically integrated recessed access device and digitline | Ceredig Roberts, Thy Tran, Jim A. Jozwiak, David K. Hwang | 2014-05-06 |
| 8692320 | Recessed memory cell access devices and gate electrodes | Jasper S. Gibbons, Darren Young, Casey Joe Smith | 2014-04-08 |
| 8669603 | Semiconductor constructions | — | 2014-03-11 |
| 8629527 | Semiconductor structures | John K. Zahurak | 2014-01-14 |
| 8629057 | Semiconductor substrates with unitary vias and via terminals, and associated systems and methods | Kyle K. Kirby | 2014-01-14 |