Issued Patents All Time
Showing 26–50 of 66 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11609846 | Managing workload of programming sets of pages to memory device | Kishore Kumar Muchherla, Jiangang Wu, Mustafa N. Kaynak, Devin M. Batutis, Xiangang Luo | 2023-03-21 |
| 11593005 | Managing voltage bin selection for blocks of a memory device | Kishore Kumar Muchherla, Mustafa N. Kaynak, Peter Feeley, Sampath K. Ratnam, Shane Nowell +2 more | 2023-02-28 |
| 11587639 | Voltage calibration scans to reduce memory device overhead | Kishore Kumar Muchherla, Mustafa N. Kaynak, Sivagnanam Parthasarathy, Xiangang Luo, Peter Feeley +4 more | 2023-02-21 |
| 11586561 | Data validity tracking in a non-volatile memory | Boon Leong Yeap | 2023-02-21 |
| 11544008 | Temperature correction in memory sub-systems | Gianni Stephen Alsasua, Ashutosh Malshe, Kishore Kumar Muchherla, Vamsi Pavan Rayaprolu, Sampath K. Ratnam +2 more | 2023-01-03 |
| 11527294 | Memory sub-system scan | Vamsi Pavan Rayaprolu, Jeffrey S. McNeil, Kishore Kumar Muchherla, Ashutosh Malshe, Jiangang Wu | 2022-12-13 |
| 11507317 | Establishing a delay period associated with a program resume operation of a memory subsystem | Jiangang Wu, Sampath K. Ratnam, Yang Zhang, Guang Chang Ye, Kishore Kumar Muchherla +2 more | 2022-11-22 |
| 11500564 | Grouping blocks based on power cycle and power on time | Kishore Kumar Muchherla, Mustafa N. Kaynak, Jiangang Wu, Sampath K. Ratnam, Sivagnanam Parthasarathy +1 more | 2022-11-15 |
| 11481348 | Handling operation collisions in a non-volatile memory | Lyle E. Adams, Mark Ish, Pushpa Seetamraju, Dan Tupy | 2022-10-25 |
| 11450391 | Multi-tier threshold voltage offset bin calibration | Kishore Kumar Muchherla, Shane Nowell, Mustafa N. Kaynak, Jiangang Wu, Devin M. Batutis +1 more | 2022-09-20 |
| 11436154 | Logical block mapping based on an offset | Ashutosh Malshe | 2022-09-06 |
| 11437108 | Voltage bin calibration based on a temporary voltage shift offset | Kishore Kumar Muchherla, Mustafa N. Kaynak, Xiangang Luo, Shane Nowell, Devin M. Batutis +4 more | 2022-09-06 |
| 11437111 | Trims corresponding to program/erase cycles | Jeffrey S. McNeil, Vamsi Pavan Rayaprolu, Giuseppina Puzzilli, Kishore Kumar Muchherla, Gil Golov +4 more | 2022-09-06 |
| 11430528 | Determining a read voltage based on a change in a read window | Vamsi Pavan Rayaprolu, Giuseppina Puzzilli, Jeffrey S. McNeil, Kishore Kumar Muchherla, Ashutosh Malshe +1 more | 2022-08-30 |
| 11416388 | Memory sub-system logical block address remapping | Kishore Kumar Muchherla, Vamsi Pavan Rayaprolu, Jiangang Wu, Gil Golov | 2022-08-16 |
| 11410734 | Voltage bin selection for blocks of a memory device after power up of the memory device | Kishore Kumar Muchherla, Sampath K. Ratnam, Shane Nowell, Sivagnanam Parthasarathy, Mustafa N. Kaynak +2 more | 2022-08-09 |
| 11403032 | Data transfer management within a memory device having multiple memory regions with different memory densities | AbdelHakim S. Alhussien, Ayberk Ozturk, Luca Bert | 2022-08-02 |
| 11392312 | Read calibration based on ranges of program/erase cycles | Vamsi Pavan Rayaprolu, Giuseppina Puzzilli, Jeffrey S. McNeil, Kishore Kumar Muchherla, Ashutosh Malshe +1 more | 2022-07-19 |
| 11372716 | Detecting special handling metadata using address verification | — | 2022-06-28 |
| 11366760 | Memory access collision management on a shared wordline | AbdelHakim S. Alhussien, Jiangang Wu, Qisong Lin, Jung Sheng Hoei | 2022-06-21 |
| 11360677 | Selective partitioning of sets of pages programmed to memory device | Kishore Kumar Muchherla, Jiangang Wu, Mustafa N. Kaynak, Devin M. Batutis, Xiangang Luo | 2022-06-14 |
| 11275523 | Per cursor logical unit number sequencing | Daniel A. Boals, Byron D. Harris | 2022-03-15 |
| 11232028 | Error-checking in namespaces on storage devices | Byron D. Harris | 2022-01-25 |
| 11189355 | Read window based on program/erase cycles | Vamsi Pavan Rayaprolu, Giuseppina Puzzilli, Jeffrey S. McNeil, Kishore Kumar Muchherla, Ashutosh Malshe +1 more | 2021-11-30 |
| 11030089 | Zone based reconstruction of logical to physical address translation map | Daniel A. Boals, Byron D. Harris, Amy Lee Wohlschlegel | 2021-06-08 |