Issued Patents All Time
Showing 176–200 of 497 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9620174 | Arrays of nonvolatile memory cells comprising a repetition of a unit cell, arrays of nonvolatile memory cells comprising a combination of vertically oriented and horizontally oriented memory cells, and arrays of vertically stacked tiers of nonvolatile memory cells | — | 2017-04-11 |
| 9595672 | Memory elements using self-aligned phase change material layers and methods of manufacturing same | — | 2017-03-14 |
| 9595664 | STT-MRAM cell structures | Gurtej S. Sandhu | 2017-03-14 |
| 9589618 | Unidirectional spin torque transfer magnetic memory cell structure | Gurtej S. Sandhu | 2017-03-07 |
| 9577250 | Thick electrodes including nanoparticles having electroactive materials and methods of making same | Jie Xiao, Dongping Lu, Jiguang Zhang, Gordon L. Graff | 2017-02-21 |
| 9559301 | Methods of forming memory device constructions, methods of forming memory cells, and methods of forming semiconductor constructions | — | 2017-01-31 |
| 9553262 | Arrays of memory cells and methods of forming an array of memory cells | Kunal R. Parekh | 2017-01-24 |
| 9552858 | STT-MRAM cell structure incorporating piezoelectric stress material | Steve Kramer, Gurtej S. Sandhu | 2017-01-24 |
| 9525191 | Magnesium-based energy storage systems and methods having improved electrolytes | Tianbiao Liu, Guosheng Li, Yuyan Shao | 2016-12-20 |
| 9525131 | Memory devices having electrodes comprising nanowires | Michael P. Violette | 2016-12-20 |
| 9502735 | Fabrication methods to produce lithium battery structures with composite layers | Ping Liu, Jocelyn Hicks-Garner, Adam F. Gross | 2016-11-22 |
| 9496268 | Integrated circuits with asymmetric and stacked transistors | Yanzhong Xu, Shankar Sinha, Shih-Lin Lee, Jeffrey Tung, Albert Ratnakumar +5 more | 2016-11-15 |
| 9478825 | Lithium battery structures employing composite layers, and fabrication methods to produce composite layers | Ping Liu, Jocelyn Hicks-Garner, Adam F. Gross | 2016-10-25 |
| 9472755 | Resistive memory architectures with multiple memory cells per access device | Michael P. Violette | 2016-10-18 |
| 9461161 | Memory element circuitry with minimum oxide definition width | Qi Xiang | 2016-10-04 |
| 9454997 | Array of nonvolatile memory cells having at least five memory cells per unit cell, having a plurality of the unit cells which individually comprise three elevational regions of programmable material, and/or having a continuous volume having a combination of a plurality of vertically oriented memory cells and a plurality of horizontally oriented memory cells; array of vertically stacked tiers of nonvolatile memory cells | — | 2016-09-27 |
| 9437809 | Memory cell having nonmagnetic filament contact and methods of operating and fabricating the same | Gurtej S. Sandhu | 2016-09-06 |
| 9437899 | Solid-state rechargeable magnesium battery | Yuyan Shao, Tianbiao Liu, Guosheng Li | 2016-09-06 |
| 9437442 | Methods for polishing phase change materials | Zhenyu Lu | 2016-09-06 |
| 9424920 | Memory cells, methods of forming memory cells, and methods of programming memory cells | Gurtej S. Sandhu | 2016-08-23 |
| 9412936 | Memory cells, methods of forming memory cells and methods of forming memory arrays | John K. Zahurak | 2016-08-09 |
| 9406960 | Energy storage systems having an electrode comprising LixSy | Jie Xiao, Jiguang Zhang, Gordon L. Graff, Wei Wang, Jianming Zheng +3 more | 2016-08-02 |
| 9406880 | Resistive memory having confined filament formation | Eugene P. Marsh | 2016-08-02 |
| 9397290 | Memory cells | — | 2016-07-19 |
| 9385718 | Input-output buffer circuit with a gate bias generator | Yanzhong Xu, Bonnie I. Wang, Jeffrey T. Watt | 2016-07-05 |