Issued Patents All Time
Showing 101–125 of 140 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6204072 | Circuit and a method for configuring pad connections in an integrated device | Hua Zheng | 2001-03-20 |
| 6194738 | Method and apparatus for storage of test results within an integrated circuit | Brett Debenham, Kim Pierce, Douglas J. Cutter, Kurt D. Beigel, Fan Ho +6 more | 2001-02-27 |
| 6190972 | Method for storing information in a semiconductor device | Hua Zheng, Michael A. Shore, Todd A. Merritt | 2001-02-20 |
| 6172935 | Synchronous dynamic random access memory device | Hua Zheng | 2001-01-09 |
| 6154860 | High-speed test system for a memory device | Hua Zheng, Paul Fuller | 2000-11-28 |
| 6144593 | Circuit and method for a multiplexed redundancy scheme in a memory device | Timothy B. Cowles, Victor Wong, James S. Cullum | 2000-11-07 |
| 6141290 | Method and apparatus for controlling the operation of an integrated circuit responsive to out-of-synchronism control signals | Timothy B. Cowles, Hua Zheng | 2000-10-31 |
| 6133053 | Circuit and a method for configuring pad connections in an integrated device | Hua Zheng | 2000-10-17 |
| 6121785 | Circuit and a method for configuring pad connections in an integrated device | Hua Zheng | 2000-09-19 |
| 6115314 | Method and apparatus for anticipatory selection of external or internal addresses in a synchronous memory device | Steven F. Schicht | 2000-09-05 |
| 6104651 | Testing parameters of an electronic device | Timothy B. Cowles | 2000-08-15 |
| 6097781 | Shared counter | Hua Zheng | 2000-08-01 |
| 6055289 | Shared counter | Hua Zheng | 2000-04-25 |
| 6055611 | Method and apparatus for enabling redundant memory | Paul Fuller | 2000-04-25 |
| 6049502 | Method for writing to multiple banks of a memory device | Timothy B. Cowles | 2000-04-11 |
| 6044027 | Circuit and method for providing a substantially constant time delay over a range of supply voltages | Hua Zheng | 2000-03-28 |
| 6026496 | Method and apparatus for generating a pulse | Steven F. Schicht | 2000-02-15 |
| 5999481 | Method and apparatus for controlling the operation of an integrated circuit responsive to out-of-synchronism control signals | Timothy B. Cowles, Hua Zheng | 1999-12-07 |
| 5982599 | Input/output electrostatic discharge protection for devices with multiple individual power groups | Manny K. F. Ma | 1999-11-09 |
| 5978309 | Selectively enabled memory array access signals | Mirmajid Seyyedy | 1999-11-02 |
| 5966388 | High-speed test system for a memory device | Hua Zheng, Paul Fuller | 1999-10-12 |
| 5959929 | Method for writing to multiple banks of a memory device | Timothy B. Cowles | 1999-09-28 |
| 5936901 | Shared data lines for memory write and memory test operations | Victor Wong, Charles L. Ingalls, Timothy B. Cowles | 1999-08-10 |
| 5923604 | Method and apparatus for anticipatory selection of external or internal addresses in a synchronous memory device | Steven F. Schicht | 1999-07-13 |
| 5917762 | Circuit and method for providing a substantially constant time delay over a range of supply voltages | Hua Zheng | 1999-06-29 |