Issued Patents All Time
Showing 25 most recent of 43 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7400544 | Actively driven VREF for input buffer noise immunity | James E. Miller | 2008-07-15 |
| 7274605 | Per-bit set-up and hold time adjustment for double-data rate synchronous DRAM | — | 2007-09-25 |
| 7152143 | Integrated semiconductor memory chip with presence detect data capability | Gordon D. Roberts | 2006-12-19 |
| 7116589 | Per-bit set-up and hold time adjustment for double-data rate synchronous DRAM | — | 2006-10-03 |
| 6959062 | Variable delay line | — | 2005-10-25 |
| 6947341 | Integrated semiconductor memory chip with presence detect data capability | Gordon D. Roberts | 2005-09-20 |
| 6898144 | Actively driven VREF for input buffer noise immunity | James E. Miller | 2005-05-24 |
| 6882587 | Method of preparing to test a capacitor | Kurt D. Beigel, Manny K. F. Ma, Gordon D. Roberts, James E. Miller, Daryl L. Habersetzer +1 more | 2005-04-19 |
| 6862224 | System and method for operating a memory array | — | 2005-03-01 |
| 6838712 | Per-bit set-up and hold time adjustment for double-data rate synchronous DRAM | — | 2005-01-04 |
| 6791381 | Method and apparatus for reducing the lock time of a DLL | James E. Miller | 2004-09-14 |
| 6778452 | Circuit and method for voltage regulation in a semiconductor device | Kurt D. Beigel, Douglas J. Cutter, Manny K. F. Ma, Gordon D. Roberts, James E. Miller +2 more | 2004-08-17 |
| 6727739 | Compensation for a delay locked loop | Christopher K. Morzano | 2004-04-27 |
| 6667911 | High speed memory architecture | — | 2003-12-23 |
| 6636093 | Compensation for a delay locked loop | Christopher K. Morzano | 2003-10-21 |
| 6625692 | Integrated semiconductor memory chip with presence detect data capability | Gordon D. Roberts | 2003-09-23 |
| 6600687 | Method of compensating for a defect within a semiconductor device | Kurt D. Beigel, Manny K. F. Ma, Gordon D. Roberts, James E. Miller, Daryl L. Habersetzer +1 more | 2003-07-29 |
| 6597619 | Actively driven VREF for input buffer noise immunity | James E. Miller | 2003-07-22 |
| 6581174 | On-chip testing circuit and method for integrated circuits | — | 2003-06-17 |
| 6570258 | Method for reducing capacitive coupling between conductive lines | Kin F. Ma | 2003-05-27 |
| 6469944 | Method of compensating for a defect within a semiconductor device | Kurt D. Beigel, Manny K. F. Ma, Gordon D. Roberts, James E. Miller, Daryl L. Habersetzer +1 more | 2002-10-22 |
| 6452846 | Driver circuit for a voltage-pulling device | Kurt D. Beigel, Douglas J. Cutter, Manny K. F. Ma, Gordon D. Roberts, James E. Miller +2 more | 2002-09-17 |
| 6445629 | Method of stressing a memory device | Kurt D. Beigel, Douglas J. Cutter, Manny K. F. Ma, Gordon D. Roberts, James E. Miller +2 more | 2002-09-03 |
| 6418071 | Method of testing a memory cell | Kurt D. Beigel, Manny K. F. Ma, Gordon D. Roberts, James E. Miller, Daryl L. Habersetzer +1 more | 2002-07-09 |
| 6388480 | Method and apparatus for reducing the lock time of DLL | James E. Miller | 2002-05-14 |