Issued Patents All Time
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6919168 | Masking methods and etching sequences for patterning electrodes of high density RAM capacitors | Jeng H. Hwang, Steve S. Y. Mak, Chentsau Ying, John W. Schaller | 2005-07-19 |
| 6734452 | Infrared radiation-detecting device | Sarath D. Gunapala, John K. Liu, Jin Seo Park, Mani Sundaram | 2004-05-11 |
| 6211529 | Infrared radiation-detecting device | Sarath D. Gunapala, John K. Liu, Jin Seo Park, Mani Sundaram | 2001-04-03 |
| 6104060 | Cost savings for manufacturing planar MOSFET devices achieved by implementing an improved device structure and fabrication process eliminating passivation layer and/or field plate | Fwu-Iuan Hshieh | 2000-08-15 |
| 5986304 | Punch-through prevention in trenched DMOS with poly-silicon layer covering trench corners | Fwu-Iuan Hshieh, Koon Chong So | 1999-11-16 |
| 5923065 | Power MOSFET device manufactured with simplified fabrication processes to achieve improved ruggedness and product cost savings | Koon Chong So, Danny Chi Nim, Fwu-Iuan Hshieh, Yan Man Tsui | 1999-07-13 |
| 5907169 | Self-aligned and process-adjusted high density power transistor with gate sidewalls provided with punch through prevention and reduced JFET resistance | Fwu-Iuan Hshieh, Koon Chong So | 1999-05-25 |
| 5895951 | MOSFET structure and fabrication process implemented by forming deep and narrow doping regions through doping trenches | Koon Chong So, Yan Man Tsui, Fwu-Iuan Hshieh, Danny Chi Nim | 1999-04-20 |
| 5883416 | Gate-contact structure to prevent contact metal penetration through gate layer without affecting breakdown voltage | Koon Chong So, Fwu-Iuan Hshieh, Yan Man Tsui | 1999-03-16 |
| 5877529 | Mosfet termination design and core cell configuration to increase breakdown voltage and to improve device ruggedness | Koon Chong So, Danny Chi Nim, Fwu-Iuan Hshieh, Yan Man Tsui, Shu-Hui Cheng | 1999-03-02 |
| 5844277 | Power MOSFETs and cell topology | Fwu-Iuan Hshieh | 1998-12-01 |
| 5763915 | DMOS transistors having trenched gate oxide | Fwu-Juan Hshieh, Danny Chi Nim, Koon Chong So, Yan Man Tsui | 1998-06-09 |
| 5731611 | MOSFET transistor cell manufactured with selectively implanted punch through prevent and threshold reductoin zones | Fwu-Iuan Hshieh | 1998-03-24 |
| 5729037 | MOSFET structure and fabrication process for decreasing threshold voltage | Fwu-Iuan Hshieh, Yan Man Tsui, Danny Chi Nim, Koon Chong So | 1998-03-17 |
| 5668026 | DMOS fabrication process implemented with reduced number of masks | Fwu-Iuan Hshieh, Danny Chi Nim, Koon Chong So, Yan Man Tsui | 1997-09-16 |
| 5648297 | Long-wavelength PTSI infrared detectors and method of fabrication thereof | Jin Seo Park, Sarath D. Gunapala, Eric Jones, Hector Del Castillo | 1997-07-15 |
| 5075243 | Fabrication of nanometer single crystal metallic CoSi.sub.2 structures on Si | Kai-Wei Nieh, Robert W. Fathauer | 1991-12-24 |
| 5010037 | Pinhole-free growth of epitaxial CoSi.sub.2 film on Si(111) | Robert W. Fathauer, Paula J. Grunthaner | 1991-04-23 |
| 4990988 | Laterally stacked Schottky diodes for infrared sensor applications | — | 1991-02-05 |