| 6048759 |
Gate/drain capacitance reduction for double gate-oxide DMOS without degrading avalanche breakdown |
Fwu-Iuan Hshieh, Koon Chong So, Yan Man Tsui |
2000-04-11 |
| 5973361 |
DMOS transistors with diffusion merged body regions manufactured with reduced number of masks and enhanced ruggedness |
Fwu-Iuan Hshieh, Kong Chong So |
1999-10-26 |
| 5930630 |
Method for device ruggedness improvement and on-resistance reduction for power MOSFET achieved by novel source contact structure |
Fwu-Iuan Hshieh, Kong Chong So |
1999-07-27 |
| 5929481 |
High density trench DMOS transistor with trench bottom implant |
Fwu-Iuan Hshieh, Brian H. Floyd, Mike F. Chang, Daniel Ng |
1999-07-27 |
| 5923065 |
Power MOSFET device manufactured with simplified fabrication processes to achieve improved ruggedness and product cost savings |
Koon Chong So, True-Lon Lin, Fwu-Iuan Hshieh, Yan Man Tsui |
1999-07-13 |
| 5895951 |
MOSFET structure and fabrication process implemented by forming deep and narrow doping regions through doping trenches |
Koon Chong So, Yan Man Tsui, Fwu-Iuan Hshieh, True-Lon Lin |
1999-04-20 |
| 5883410 |
Edge wrap-around protective extension for covering and protecting edges of thick oxide layer |
Koon Chong So, Fwu-Iuan Hshieh, Yan Man Tsui |
1999-03-16 |
| 5877529 |
Mosfet termination design and core cell configuration to increase breakdown voltage and to improve device ruggedness |
Koon Chong So, Fwu-Iuan Hshieh, Yan Man Tsui, True-Lon Lin, Shu-Hui Cheng |
1999-03-02 |
| 5763914 |
Cell topology for power transistors with increased packing density |
Fwu-Iuan Hshieh |
1998-06-09 |
| 5763915 |
DMOS transistors having trenched gate oxide |
Fwu-Juan Hshieh, True-Lon Lin, Koon Chong So, Yan Man Tsui |
1998-06-09 |
| 5747853 |
Semiconductor structure with controlled breakdown protection |
Koon Chong So, Fwu-Iuan Hshieh, True-Lon Line, Yan Man Ysui |
1998-05-05 |
| 5729037 |
MOSFET structure and fabrication process for decreasing threshold voltage |
Fwu-Iuan Hshieh, Yan Man Tsui, True-Lon Lin, Koon Chong So |
1998-03-17 |
| 5668026 |
DMOS fabrication process implemented with reduced number of masks |
True-Lon Lin, Fwu-Iuan Hshieh, Koon Chong So, Yan Man Tsui |
1997-09-16 |