Issued Patents All Time
Showing 1–25 of 35 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11869613 | Semiconductor structure and endurance test method using the same | Hsiang-Lan Lung | 2024-01-09 |
| 11590620 | Motion control method for dual-spindle machining, dual-spindle machining apparatus and computer program product | Meng Lai | 2023-02-28 |
| 11557342 | Multi-level cell threshold voltage operation of one-selector-one-resistor structure included in a crossbar array | Nanbo Gong, Matthew J. BrightSky, Christopher P. Miller, Hsiang-Lan Lung | 2023-01-17 |
| 11139025 | Multi-level cell threshold voltage operation of one-selector-one-resistor structure included in a crossbar array | Nanbo Gong, Matthew J. BrightSky, Christopher P. Miller, Hsiang-Lan Lung | 2021-10-05 |
| 10312276 | Image sensor package to limit package height and reduce edge flare | Wei-Feng Lin | 2019-06-04 |
| 10157671 | Fast switching 3D cross-point array | Hsiang-Lan Lung | 2018-12-18 |
| 10020335 | Short-resistant chip-scale package | Ying-Chih Kuo | 2018-07-10 |
| 9882126 | Phase change storage device with multiple serially connected storage regions | Matthew J. BrightSky, Huai-Yu Cheng, Sangbum Kim, Chiao-Wen Yeh | 2018-01-30 |
| 9680095 | Resistive RAM and fabrication method | I Yueh Chen | 2017-06-13 |
| 9507663 | Memory device and operation method | Hsin-Yi Ho, Hsiang-Lan Lung, Tu-Shun Chen, Chia-Jung Chen | 2016-11-29 |
| 9336879 | Multiple phase change materials in an integrated circuit for system on a chip application | Hsiang-Lan Lung, Chao-I Wu | 2016-05-10 |
| 9324428 | Memory device and operation method thereof | Yung-Han Ho | 2016-04-26 |
| 9276090 | Self-rectified device, method for manufacturing the same, and applications of the same | Dai-Ying Lee, Erh-Kun Lai, Ming-Hsiu Lee | 2016-03-01 |
| 9196828 | Resistive memory and fabricating method thereof | Ming-Hsiu Lee | 2015-11-24 |
| 9070860 | Resistance memory cell and operation method thereof | Ming-Hsiu Lee | 2015-06-30 |
| 9035275 | Three dimensional memory array adjacent to trench sidewalls | Ming-Hsiu Lee, Shih-Hung Chen | 2015-05-19 |
| 9036397 | Resistive memory array and method for controlling operations of the same | Ming-Hsiu Lee, Feng-Ming Lee | 2015-05-19 |
| 9000412 | Switching device and operating method for the same and memory array | Feng-Ming Lee, Ming-Hsiu Lee | 2015-04-07 |
| 8987699 | Conductive bridge resistive memory device and method of manufacturing the same | Feng-Min Lee, Yu-Yu Lin, Wei-Chen Chen, Ming-Hsiu Lee | 2015-03-24 |
| 8962466 | Low temperature transition metal oxide for memory device | Feng-Min Lee, Erh-Kun Lai, Ming-Hsiu Lee, Chih-Chieh Yu | 2015-02-24 |
| 8937291 | Three-dimensional array structure for memory devices | Ming-Hsiu Lee | 2015-01-20 |
| 8772106 | Graded metal oxide resistance based semiconductor memory device | Ming-Daou Lee, Erh-Kun Lai, Kuang Yeu Hsieh, Chien-Hung Yeh | 2014-07-08 |
| 8699258 | Verification algorithm for metal-oxide resistive memory | Ming-Hsiu Lee, Yan-Ru Chen | 2014-04-15 |
| 8488362 | Graded metal oxide resistance based semiconductor memory device | Ming-Daou Lee, Erh-Kun Lai, Kuang Yeu Hsieh, Chien-Hung Yeh | 2013-07-16 |
| 8331127 | Nonvolatile memory device having a transistor connected in parallel with a resistance switching device | Yi-Chou Chen, Feng-Ming Lee | 2012-12-11 |