Issued Patents All Time
Showing 201–225 of 234 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7468299 | Non-volatile memory cells and methods of manufacturing the same | ChiaHua Ho, Hang-Ting Lue | 2008-12-23 |
| 7463530 | Operating method of non-volatile memory device | Hang-Ting Lue, Szu-Yu Wang | 2008-12-09 |
| 7450423 | Methods of operating non-volatile memory cells having an oxide/nitride multilayer insulating structure | Yen-Hao Shih, Tzu-Hsuan Hsu, Shih-Chih Lee, Jung-Yu Hsieh, Kuang Yeu Hsieh | 2008-11-11 |
| 7442603 | Self-aligned structure and method for confining a melting point in a resistor random access memory | ChiaHua Ho, Kuang Yeu Hsieh, Shih-Hung Chen | 2008-10-28 |
| 7419868 | Gated diode nonvolatile memory process | Tien-Fan Ou, Wen-Jer Tsai, Hsuan-Ling Kao | 2008-09-02 |
| 7414282 | Method of manufacturing a non-volatile memory device | ChiaHua Ho, Yen-Hao Shih, Hang-Ting Lue, Kuang Yeu Hsieh | 2008-08-19 |
| 7388771 | Methods of operating a bistable resistance random access memory with multiple memory layers and multilevel memory states | ChiaHua Ho, Kuang Yeu Hsieh | 2008-06-17 |
| 7279385 | Flash memory device and manufacturing method thereof | Hang-Ting Lue, Yen-Hao Shih, Chia-Hua Ho | 2007-10-09 |
| 7268379 | Memory cell and method for manufacturing the same | Tzu-Hsuan Hsu, Hang-Ting Lue, Chia-Hua Ho | 2007-09-11 |
| 7106623 | Phase-change multi-level cell and operating method thereof | Jen-Ren Hung | 2006-09-12 |
| 7067375 | Non-volatile memory and method for fabricating the same | Hang-Ting Lue, Yen-Hao Shih, Chia-Hua Ho | 2006-06-27 |
| 7030459 | Three-dimensional memory structure and manufacturing method thereof | Ming-Chung Liang | 2006-04-18 |
| 7002206 | Multi-bit memory unit and fabrication method thereof | — | 2006-02-21 |
| 6858495 | Multi-bit memory unit and fabrication method thereof | — | 2005-02-22 |
| 6828197 | Method for fabricating nitride read only memory | — | 2004-12-07 |
| 6790720 | Method for fabricating a MOSFET and reducing line width of gate structure | — | 2004-09-14 |
| 6723603 | Method of utilizing fabrication process of poly-Si spacer to build flash memory with 2bit/cell | Chien-Hung Liu, Shyi-Shuh Pan, Shou-Wei Huang, Ying Tzoo Chen | 2004-04-20 |
| 6706598 | Method of fabricating discrete NROM cell by self aligned process | — | 2004-03-16 |
| 6670672 | Structure of discrete NROM cell | Kent Kuohua Chang | 2003-12-30 |
| 6599801 | Method of fabricating NROM memory cell | Kent Kuohua Chang | 2003-07-29 |
| 6566225 | Formation method of shallow trench isolation | Hsin-Huei Chen, Yu-Ping Huang | 2003-05-20 |
| 6551880 | Method of utilizing fabrication process of floating gate spacer to build twin-bit monos/sonos memory | Chien-Hung Liu, Shou-Wei Huang, Shyi-Shuh Pan, Ying Tzoo Chen | 2003-04-22 |
| 6548406 | Method for forming integrated circuit having MONOS device and mixed-signal circuit | Hsin-Huei Chen, Ying-Tso Chen, Shou-Wei Hwang, Yu-Ping Huang | 2003-04-15 |
| 6482738 | Method of locally forming metal silicide layers | Ying-Tso Chen, Hsin-Huei Chen, Shou-Wei Hwang, Yu-Ping Huang | 2002-11-19 |
| 6468867 | Method for forming the partial salicide | Hsin-Huei Chen, Ying-Tso Chen, Shou-Wei Hwang, Yu-Ping Huang | 2002-10-22 |