Issued Patents All Time
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9105505 | Memory cell having a recessed gate and manufacturing method thereof | Chien-Chi Lee, Chia-Ming Yang, Wei-Ping Lee, Chih-Yuan Hsiao, Ping-Sheng Kao +3 more | 2015-08-11 |
| 9000532 | Vertical PMOS field effect transistor and manufacturing method thereof | Chung-Yuan Lee | 2015-04-07 |
| 8802528 | Vertical PMOS field effect transistor and manufacturing method thereof | Chung-Yuan Lee | 2014-08-12 |
| 7923770 | Memory device and method of fabricating the same | Chih-Lin Chen, Kuang-Wen Liu | 2011-04-12 |
| 7919372 | Method for forming oxide on ONO structure | Chih-Hao Wang, Chong-Jen Huang, Kuang-Wen Liu, Jia-Rong Chiou, Chong Chen | 2011-04-05 |
| 7241558 | Multi-layer semiconductor integrated circuits enabling stabilizing photolithography process parameters, the photomask being used, and the manufacturing method thereof | Chong-Jen Huang, Kuang-Wen Liu, Chih-Hao Wang, Jia-Rong Chiou | 2007-07-10 |
| 7183166 | Method for forming oxide on ONO structure | Chih-Hao Wang, Chong-Jen Huang, Kuang-Wen Liu, Jia-Rong Chiou, Chong Chen | 2007-02-27 |
| 7097945 | Method of reducing critical dimension bias of dense pattern and isolation pattern | Ching-Yu Chang, Meng-Wei Chen | 2006-08-29 |
| 6994580 | Network plug | — | 2006-02-07 |
| 6599793 | Memory array with salicide isolation | Ming-Hung Chou, Jui-Lin Lu, Chong-Jen Huang, Shou-Wei Hwang | 2003-07-29 |
| 6566225 | Formation method of shallow trench isolation | Erh-Kun Lai, Yu-Ping Huang | 2003-05-20 |
| 6548406 | Method for forming integrated circuit having MONOS device and mixed-signal circuit | Erh-Kun Lai, Ying-Tso Chen, Shou-Wei Hwang, Yu-Ping Huang | 2003-04-15 |
| 6531393 | Salicide integrated solution for embedded virtual-ground memory | Chong-Jen Huang, Kuang-Wen Liu, Chih-Hao Wang | 2003-03-11 |
| 6482738 | Method of locally forming metal silicide layers | Ying-Tso Chen, Erh-Kun Lai, Shou-Wei Hwang, Yu-Ping Huang | 2002-11-19 |
| 6468867 | Method for forming the partial salicide | Erh-Kun Lai, Ying-Tso Chen, Shou-Wei Hwang, Yu-Ping Huang | 2002-10-22 |
| 6448126 | Method of forming an embedded memory | Erh-Kun Lai, Shou-Wei Huang, Ying-Tso Chen, Chien-Hung Liu, Shyi-Shuh Pan | 2002-09-10 |
| 6413861 | Method of fabricating a salicide of an embedded memory | Chong-Jen Huang, Chih-Hao Wang, Kuang-Wen Liu | 2002-07-02 |
| 6383903 | Method for forming the partial salicide | Erh-Kun Lai, Ying-Tso Chen, Shou-Wei Hwang, Yu-Ping Huang | 2002-05-07 |
| 6372640 | Method of locally forming metal silicide layers | Ying-Tso Chen, Erh-Kun Lai, Shou-Wei Hwang, Yu-Ping Huang | 2002-04-16 |
| 6271090 | Method for manufacturing flash memory device with dual floating gates and two bits per cell | Chong-Jen Huang, Lenvis Liu, Tony Wang, Frank Chiou | 2001-08-07 |
| 5727967 | Metal contact plate of a module plug | — | 1998-03-17 |