Issued Patents All Time
Showing 1–23 of 23 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11991882 | Method for fabricating memory device | Yao-An Chung, Yuan-Chieh Chiu, Ting-Feng Liao, Kuang-Chao Chen | 2024-05-21 |
| 11917828 | Memory devices with multiple string select line cuts | Ting-Feng Liao, Mao-Yuan WENG | 2024-02-27 |
| 11374099 | 3D memory device including source line structure comprising composite material | Ting-Feng Liao, Sheng-Hong CHEN | 2022-06-28 |
| 11211401 | Memory device and method for fabricating the same | Yao-An Chung, Yuan-Chieh Chiu, Ting-Feng Liao, Kuang-Chao Chen | 2021-12-28 |
| 11183513 | Semiconductor device and method for fabricating the same | Jr-Meng Wang, Cheng-Wei Lin | 2021-11-23 |
| 10867909 | Semiconductor structure and method of fabricating wiring structure | Meng-Han Tsai, Yi-Chen Wang, Kuan-Chih Chen | 2020-12-15 |
| 9741607 | Photo pattern method to increase via etching rate | Zheng-Chang Mu, Cheng-Wei Lin | 2017-08-22 |
| 9583495 | Method for fabricating memory device | — | 2017-02-28 |
| 9536808 | Photo pattern method to increase via etching rate | Zheng-Chang Mu, Cheng-Wei Lin | 2017-01-03 |
| 9530786 | Memory device and method for fabricating the same | — | 2016-12-27 |
| 9384989 | Sonos device and method for fabricating the same | Ching-Chang Lin, Kai-Hsiang Chang, Chih-Yuan Wu | 2016-07-05 |
| 9245901 | Memory device and method for fabricating the same | — | 2016-01-26 |
| 9153535 | Line layout and method of spacer self-aligned quadruple patterning for the same | Chih-Yuan Wu | 2015-10-06 |
| 8803223 | SONOS device and method for fabricating the same | Ching-Chang Lin, Kai-Hsiang Chang, Chih-Yuan Wu | 2014-08-12 |
| 7923770 | Memory device and method of fabricating the same | Chih-Lin Chen, Hsin-Huei Chen | 2011-04-12 |
| 7919372 | Method for forming oxide on ONO structure | Chih-Hao Wang, Hsin-Huei Chen, Chong-Jen Huang, Jia-Rong Chiou, Chong Chen | 2011-04-05 |
| 7241558 | Multi-layer semiconductor integrated circuits enabling stabilizing photolithography process parameters, the photomask being used, and the manufacturing method thereof | Chong-Jen Huang, Hsin-Huei Chen, Chih-Hao Wang, Jia-Rong Chiou | 2007-07-10 |
| 7183166 | Method for forming oxide on ONO structure | Chih-Hao Wang, Hsin-Huei Chen, Chong-Jen Huang, Jia-Rong Chiou, Chong Chen | 2007-02-27 |
| 6856533 | Method of modulating threshold voltage of a mask ROM | — | 2005-02-15 |
| 6762089 | Method for manufacturing a memory device | Chong-Jen Huang, Jui-Lin Lu | 2004-07-13 |
| 6664586 | Memory device and manufacturing method thereof | Chong-Jen Huang, Jui-Lin Lu | 2003-12-16 |
| 6531393 | Salicide integrated solution for embedded virtual-ground memory | Chong-Jen Huang, Hsin-Huei Chen, Chih-Hao Wang | 2003-03-11 |
| 6413861 | Method of fabricating a salicide of an embedded memory | Chong-Jen Huang, Hsin-Huei Chen, Chih-Hao Wang | 2002-07-02 |