Issued Patents All Time
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12051936 | Self-powered power supply drive circuit and chip | Xueren Yang, Kelvin Yupak Hui | 2024-07-30 |
| 11996835 | Darlington transistor drive circuit, method and switching power supply management chip | Yuquan Huang, Kelvin Yupak Hui | 2024-05-28 |
| 11875841 | Memory device with high data bandwidth | Chun-Cheng Chen | 2024-01-16 |
| 11424683 | Darlington transistor drive circuit, method and constant current switching power supply | Kelvin Yupak Hui, Yuquan Huang | 2022-08-23 |
| 11334100 | Self-calibrated system on a chip (SoC) | Yung Cheng Su, Ting L. Chu | 2022-05-17 |
| 11126560 | System-on-chip module for avoiding redundant memory access | Yung Cheng Su | 2021-09-21 |
| D928141 | Ticket dispenser | Chun-Chin Huang, Wan-Ling Huang, Ye-Sing Lu, Wei-Wei Yeh, Jhih-Fang Fong +1 more | 2021-08-17 |
| 9083359 | Lock detector based on charge pump | Uday Dasgupta, Tieng Ying Choke | 2015-07-14 |
| 8749274 | Level sensitive comparing device | Uday Dasgupta | 2014-06-10 |
| 7919372 | Method for forming oxide on ONO structure | Chih-Hao Wang, Hsin-Huei Chen, Kuang-Wen Liu, Jia-Rong Chiou, Chong Chen | 2011-04-05 |
| 7241558 | Multi-layer semiconductor integrated circuits enabling stabilizing photolithography process parameters, the photomask being used, and the manufacturing method thereof | Hsin-Huei Chen, Kuang-Wen Liu, Chih-Hao Wang, Jia-Rong Chiou | 2007-07-10 |
| 7183166 | Method for forming oxide on ONO structure | Chih-Hao Wang, Hsin-Huei Chen, Kuang-Wen Liu, Jia-Rong Chiou, Chong Chen | 2007-02-27 |
| 7060551 | Method of fabricating read only memory and memory cell array | — | 2006-06-13 |
| 6972230 | Method for fabricating a floating gate memory device | Shyi-Shuh Pan | 2005-12-06 |
| 6914842 | Pure CMOS latch-type fuse circuit | Yu-Ming Hsu, Jie-Hau Huang | 2005-07-05 |
| 6762089 | Method for manufacturing a memory device | Kuang-Wen Liu, Jui-Lin Lu | 2004-07-13 |
| 6664586 | Memory device and manufacturing method thereof | Kuang-Wen Liu, Jui-Lin Lu | 2003-12-16 |
| 6599793 | Memory array with salicide isolation | Ming-Hung Chou, Jui-Lin Lu, Shou-Wei Hwang, Hsin-Huei Chen | 2003-07-29 |
| 6531393 | Salicide integrated solution for embedded virtual-ground memory | Hsin-Huei Chen, Kuang-Wen Liu, Chih-Hao Wang | 2003-03-11 |
| 6413861 | Method of fabricating a salicide of an embedded memory | Hsin-Huei Chen, Chih-Hao Wang, Kuang-Wen Liu | 2002-07-02 |
| 6271090 | Method for manufacturing flash memory device with dual floating gates and two bits per cell | Hsin-Huei Chen, Lenvis Liu, Tony Wang, Frank Chiou | 2001-08-07 |