Issued Patents All Time
Showing 51–75 of 149 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9349443 | Method and system for programming multi-level cell memory | Win-San Khwa | 2016-05-24 |
| 9336878 | Method and apparatus for healing phase change memory devices | Win-San Khwa, Tzu-Hsiang Su, Hsiang-Pang Li | 2016-05-10 |
| 9336879 | Multiple phase change materials in an integrated circuit for system on a chip application | Hsiang-Lan Lung, Wei-Chih Chien | 2016-05-10 |
| 9336867 | Phase change memory coding | Hsiang-Lan Lung, Ming-Hsiu Lee, Yen-Hao Shih, Tien-Yen Wang | 2016-05-10 |
| 9312029 | Memory device and associated controlling method | Win-San Khwa, Tzu-Hsiang Su | 2016-04-12 |
| 8908426 | Cell sensing circuit for phase change memory and methods thereof | Tien-Yen Wang, Chun-Hsiung Hung | 2014-12-09 |
| 8891293 | High-endurance phase change memory devices and methods for operating the same | Pei DU, Ming-Hsiu Lee, Sangbum Kim, Chung H. Lam | 2014-11-18 |
| 8659952 | Method of operating non-volatile memory | Ming-Chang Kuo | 2014-02-25 |
| 8634235 | Phase change memory coding | Hsiang-Lan Lung, Ming-Hsiu Lee, Yen-Hao Shih, Tien-Yen Wang | 2014-01-21 |
| 8481388 | Non-volatile memory device having a nitride-oxide dielectric layer | Tzu-Hsuan Hsu, Hang-Ting Lue, Erh-Kun Lai | 2013-07-09 |
| 8467238 | Dynamic pulse operation for phase change memory | — | 2013-06-18 |
| 8432745 | High second bit operation window method for virtual ground array with two-bit memory cells | — | 2013-04-30 |
| 8426906 | Method and structure for a semiconductor charge storage device | — | 2013-04-23 |
| 8378382 | High aspect-ratio PN-junction and method for manufacturing the same | Ming-Hsiu Lee | 2013-02-19 |
| 8374019 | Phase change memory with fast write characteristics | Yen-Hao Shih, Ming-Hsiu Lee | 2013-02-12 |
| 8363463 | Phase change memory having one or more non-constant doping profiles | Yen-Hao Shih, Huai-Yu Cheng, Chieh-Fang Chen, Ming-Hsiu Lee, Hsiang-Lan Lung +3 more | 2013-01-29 |
| 8334182 | Method for manufacturing non-volatile memory | — | 2012-12-18 |
| 8329535 | Multi-level-cell trapping DRAM | — | 2012-12-11 |
| 8295094 | Method of operating non-volatile memory cell | — | 2012-10-23 |
| 8263464 | Systems and methods for memory structure comprising a PPROM and an embedded flash memory | — | 2012-09-11 |
| 8258029 | Semiconductor structure and process for reducing the second bit effect of a memory device | Tzu-Hsuan Hsu | 2012-09-04 |
| 8241928 | Test structure and method for detecting charge effects during semiconductor processing | Ming-Hsiu Lee, Ming-Chang Kuo | 2012-08-14 |
| 8238149 | Methods and apparatus for reducing defect bits in phase change memory | Yen-Hao Shih, Ming-Hsiu Lee, Hsiang-Lan Lung, Chung H. Lam, Roger W. Cheek +2 more | 2012-08-07 |
| 8223540 | Method and apparatus for double-sided biasing of nonvolatile memory | — | 2012-07-17 |
| 8178407 | Systems and methods for a high density, compact memory array | Tzu-Hsuan Hsu, Ming-Hsiu Lee, Ming-Chang Kuo | 2012-05-15 |