Issued Patents All Time
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9417847 | Low depth combinational finite field multiplier | Sergey B. Gashkov, Anatoli Bolotov, Mikhail I. Grinchuk, Lav D. Ivanovic, Anatoly A. Chasovshikh +1 more | 2016-08-16 |
| 8831221 | Unified architecture for crypto functional units | Anatoli Bolotov, Mikhail I. Grinchuk, Lav D. Ivanovic, Igor Kucherenko | 2014-09-09 |
| 8452006 | Cryptographic processing using a processor | Dmitriy Vladimirovich Alekseev, Aleksey Alexandrovich Letunovskiy, Alexander Markovic, Andrey Nikitin | 2013-05-28 |
| 8447988 | Hash processing using a processor | Dmitriy Vladimirovich Alekseev, Ilya Lyalin, Alexander Markovic, Denis Vassilevich Parfenov | 2013-05-21 |
| 8302083 | Architecture and implementation method of programmable arithmetic controller for cryptographic applications | Anatoli Bolotov, Mikhail I. Grinchuk, Lav D. Ivanovic | 2012-10-30 |
| 8160242 | Efficient implementation of arithmetical secure hash techniques | Mikhail I. Grinchuk, Anatoli Bolotov, Lay D. Ivanovic, Andrej A. Zolotykh | 2012-04-17 |
| 7568175 | Ramptime propagation on designs with cycles | Andrej A. Zolotykh, Elyar E. Gasanov, Ilya Lyalin | 2009-07-28 |
| 7496870 | Method of selecting cells in logic restructuring | Iliya V. Lyalin, Andrej A. Zolotykh, Elyar E. Gasanov | 2009-02-24 |
| 7401313 | Method and apparatus for controlling congestion during integrated circuit design resynthesis | Elyar E. Gasanov, Iliya V. Lyalin | 2008-07-15 |
| 7398486 | Method and apparatus for performing logical transformations for global routing | Elyar E. Gasanov, Andrej A. Zolotykh | 2008-07-08 |
| 7257791 | Multiple buffer insertion in global routing | Elyar E. Gasanov, Andrej A. Zolotykh, Iliya V. Lyalin | 2007-08-14 |
| 7246336 | Ramptime propagation on designs with cycles | Andrej A. Zolotykh, Elyar E. Gasanov, Ilya Lyalin | 2007-07-17 |
| 7146591 | Method of selecting cells in logic restructuring | Iliya V. Lyalin, Andrej A. Zolotykh, Elyar E. Gasanov | 2006-12-05 |
| 7111267 | Process and apparatus to assign coordinates to nodes of logical trees without increase of wire lengths | Elyar E. Gasanov, Iliya V. Lyalin, Andrej A. Zolotykh | 2006-09-19 |
| 7103865 | Process and apparatus for placement of megacells in ICs design | Valeriy B. Kudryavtsev, Elyar E. Gasanov | 2006-09-05 |
| 7003739 | Method and apparatus for finding optimal unification substitution for formulas in technology library | Elyar E. Gasanov, Alexander S. Podkolzin | 2006-02-21 |