Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12316483 | Encoding and decoding for PAM transmitter and receiver | Jose A. Tierno, Sanjeev S. Gokhale, Sunil Bhosekar | 2025-05-27 |
| 8700878 | Event triggered memory mapped access | Joseph P. Gergen, Jason T. Nearing, Zheng Xu | 2014-04-15 |
| 7493541 | Method and system for performing built-in-self-test routines using an accumulator to store fault information | Ghasi R. Agrawal, Mukesh K. Puri | 2009-02-17 |
| 7260758 | Method and system for performing built-in self-test routines using an accumulator to store fault information | Ghasi R. Agrawal, Mukesh K. Puri | 2007-08-21 |
| 7076699 | Method for testing semiconductor devices having built-in self repair (BISR) memory | Mukesh K. Puri, Ghasi R. Agrawal | 2006-07-11 |
| 6795942 | Built-in redundancy analysis for memories with row and column repair | — | 2004-09-21 |
| 6505313 | Multi-condition BISR test mode for memories with redundancy | Tuan Phan | 2003-01-07 |
| 6505308 | Fast built-in self-repair circuit | — | 2003-01-07 |
| 6496947 | Built-in self repair circuit with pause for data retention coverage | — | 2002-12-17 |
| 6255836 | Built-in self-test unit having a reconfigurable data retention test | V. Swamy Irrinki | 2001-07-03 |
| 6067262 | Redundancy analysis for embedded memories with built-in self test and built-in self repair | V. Swamy Irrinki, Tuan Phan | 2000-05-23 |
| 5982681 | Reconfigurable built-in self test circuit | — | 1999-11-09 |
| 5909404 | Refresh sampling built-in self test and repair circuit | — | 1999-06-01 |
| 5835429 | Data retention weak write circuit and method of using same | — | 1998-11-10 |