Issued Patents All Time
Showing 26–50 of 138 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12108608 | Memory devices with dual encapsulation layers and methods of fabrication | Debraj Guhabiswas, Tanay Gosavi, Niloy Mukherjee, Amrita Mathuriya, Sasikanth Manipatruni | 2024-10-01 |
| 12096638 | One transistor and N memory element based memory bit-cell having stacked and folded planar memory elements with and without offset | Rajeev Kumar Dokania, Amrita Mathuriya, Debo Olaosebikan, Tanay Gosavi, Sasikanth Manipatruni | 2024-09-17 |
| 12094923 | Rapid thermal annealing (RTA) methodologies for integration of perovskite-material based memory devices | Niloy Mukherjee, Somilkumar J. Rathi, Jason Y. Wu, Pratyush Pandey, Zeying Ren +8 more | 2024-09-17 |
| 12087730 | Multi-input threshold gate having stacked and folded planar capacitors with and without offset | Rajeev Kumar Dokania, Amrita Mathuriya, Debo Olaosebikan, Tanay Gosavi, Sasikanth Manipatruni | 2024-09-10 |
| 12089362 | Blank panel | Mineki Ogata, Kosuke Watanabe | 2024-09-10 |
| 12080781 | Fabrication of thin film fin transistor structure | Sarah Atanasov, Abhishek A. Sharma, Bernhard Sell, Chieh-Jen Ku, Elliot N. Tan +6 more | 2024-09-03 |
| 12069866 | Pocket integration process for embedded memory | Tanay Gosavi, Niloy Mukherjee, Amrita Mathuriya, Rajeev Kumar Dokania, Sasikanth Manipatruni | 2024-08-20 |
| 12062936 | Controlling power supply from an electric power source to communication facilities in a communication system | Takayuki Furuya | 2024-08-13 |
| 12062584 | Iterative method of multilayer stack development for device applications | Sasikanth Manipatruni, Niloy Mukherjee, Tanay Gosavi, Mauricio Manfrini, Somilkumar J. Rathi +4 more | 2024-08-13 |
| 12052842 | Blank panel | Kosuke Watanabe, Mineki Ogata | 2024-07-30 |
| 12041785 | 1TnC memory bit-cell having stacked and folded non-planar capacitors | Rajeev Kumar Dokania, Amrita Mathuriya, Debo Olaosebikan, Tanay Gosavi, Sasikanth Manipatruni | 2024-07-16 |
| 12034086 | Trench capacitors with continuous dielectric layer and methods of fabrication | Somilkumar J. Rathi, Niloy Mukherjee, Rajeev Kumar Dokania, Amrita Mathuriya, Tanay Gosavi +3 more | 2024-07-09 |
| 12029043 | Planar and trench capacitors with hydrogen barrier dielectric for logic and memory applications and methods of fabrication | Somilkumar J. Rathi, Niloy Mukherjee, Rajeev Kumar Dokania, Amrita Mathuriya, Tanay Gosavi +3 more | 2024-07-02 |
| 12027458 | Subtractively patterned interconnect structures for integrated circuits | Kevin Lin, Tristan A. Tronic, Michael Christenson, Christopher J. Jezewski, Jiun-Ruey Chen +10 more | 2024-07-02 |
| 12022662 | Planar and trench capacitors for logic and memory applications and methods of fabrication | Somilkumar J. Rathi, Niloy Mukherjee, Rajeev Kumar Dokania, Amrita Mathuriya, Tanay Gosavi +3 more | 2024-06-25 |
| 12016185 | Planar and trench capacitors for logic and memory applications | Somilkumar J. Rathi, Niloy Mukherjee, Rajeev Kumar Dokania, Amrita Mathuriya, Tanay Gosavi +3 more | 2024-06-18 |
| 12010854 | Multi-level hydrogen barrier layers for memory applications and methods of fabrication | Niloy Mukherjee, Mauricio Manfrini, Tanay Gosavi, Rajeev Kumar Dokania, Somilkumar J. Rathi +2 more | 2024-06-11 |
| 11997853 | 1TnC memory bit-cell having stacked and folded planar capacitors with lateral offset | Rajeev Kumar Dokania, Amrita Mathuriya, Debo Olaosebikan, Tanay Gosavi, Sasikanth Manipatruni | 2024-05-28 |
| 11996438 | Pocket flow for trench capacitors integrated with planar capacitors on a same substrate and method of fabrication | Somilkumar J. Rathi, Niloy Mukherjee, Rajeev Kumar Dokania, Amrita Mathuriya, Tanay Gosavi +3 more | 2024-05-28 |
| 11985832 | Planar and trench capacitors with hydrogen barrier dielectric for logic and memory applications | Somilkumar J. Rathi, Niloy Mukherjee, Rajeev Kumar Dokania, Amrita Mathuriya, Tanay Gosavi +3 more | 2024-05-14 |
| 11978762 | Planar capacitors with non-linear polar material staggered on a shared electrode | Rajeev Kumar Dokania, Amrita Mathuriya, Debo Olaosebikan, Tanay Gosavi, Sasikanth Manipatruni | 2024-05-07 |
| 11961877 | Dual hydrogen barrier layer for trench capacitors integrated with low density film for logic structures | Somilkumar J. Rathi, Niloy Mukherjee, Rajeev Kumar Dokania, Amrita Mathuriya, Tanay Gosavi +3 more | 2024-04-16 |
| 11955560 | Passivation layers for thin film transistors and methods of fabrication | Abhishek A. Sharma, Arnab Sen Gupta, Travis W. Lajoie, Sarah Atanasov, Chieh-Jen Ku +5 more | 2024-04-09 |
| 11955512 | Dual hydrogen barrier layer for trench capacitors integrated with low density film for logic structures and methods of fabrication | Somilkumar J. Rathi, Niloy Mukherjee, Rajeev Kumar Dokania, Amrita Mathuriya, Tanay Gosavi +3 more | 2024-04-09 |
| 11955153 | Multi-element gain memory bit-cell having stacked and folded planar memory elements with and without offset | Rajeev Kumar Dokania, Amrita Mathuriya, Debo Olaosebikan, Tanay Gosavi, Sasikanth Manipatruni | 2024-04-09 |