Issued Patents All Time
Showing 1–25 of 34 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9966441 | Semiconductor device with two-dimensional electron gas | Takuo KIKUCHI, Masahiko Yamamoto | 2018-05-08 |
| 8058693 | Semiconductor device having switching element and method for fabricating semiconductor device having switching element | Koichi Endo, Masaru Izumisawa, Takuma Hara, Syotaro Ono | 2011-11-15 |
| 6524894 | Semiconductor device for use in power-switching device and method of manufacturing the same | Hideki Nozaki, Motoshige Kobayashi | 2003-02-25 |
| 6476429 | Semiconductor device with breakdown voltage improved by hetero region | — | 2002-11-05 |
| 6337498 | Semiconductor device having directionally balanced gates and manufacturing method | Shigeru Hasegawa, Hideo Matsuda, Masanobu Tsuchitani | 2002-01-08 |
| 6239464 | Semiconductor gate trench with covered open ends | Masanobu Tsuchitani, Keita Suzuki, Akihiko Osawa | 2001-05-29 |
| 6060747 | Semiconductor device | Hideki Okumura, Akihiko Osawa, Noboru Matsuda, Masanobu Tsuchitani | 2000-05-09 |
| 6031276 | Semiconductor device and method of manufacturing the same with stable control of lifetime carriers | Akihiko Osawa, Masanobu Tsuchitani, Shizue Hori | 2000-02-29 |
| 6010950 | Method of manufacturing semiconductor bonded substrate | Hideki Okumura, Akihiko Osawa | 2000-01-04 |
| 5917228 | Trench-type schottky-barrier diode | Noboru Matsuda | 1999-06-29 |
| 5877540 | Epitaxial-base bipolar transistor | Hiroshi Naruse, Hiroyuki Sugaya, Hidenori Saihara | 1999-03-02 |
| 5864180 | Semiconductor device and method for manufacturing the same | Shizue Hori, Hiroyuki Sugaya, Hiroshi Naruse | 1999-01-26 |
| 5770514 | Method for manufacturing a vertical transistor having a trench gate | Noboru Matsuda, Satoshi Yanagiya, Masanobu Tsuchitani | 1998-06-23 |
| 5733810 | Method of manufacturing MOS type semiconductor device of vertical structure | Hiroshi Naruse | 1998-03-31 |
| 5731637 | Semiconductor device | Shizue Hori, Akihiko Osawa, Shigeo Yawata | 1998-03-24 |
| 5726088 | Method of manufacturing a semiconductor device having a buried insulated gate | Satoshi Yanagiya, Noboru Matsuda | 1998-03-10 |
| 5610422 | Semiconductor device having a buried insulated gate | Satoshi Yanagiya, Noboru Matsuda | 1997-03-11 |
| 5589421 | Method of manufacturing annealed films | Naoto Miyashita, Koichi Takahashi, Mitsutoshi Koyama, Shinji Nunotani, Satoshi Yanagiya | 1996-12-31 |
| 5578508 | Vertical power MOSFET and process of fabricating the same | Satoshi Yanagiya, Noboru Matsuda, Akihiko Osawa, Masanobu Tsuchitani | 1996-11-26 |
| 5554872 | Semiconductor device and method of increasing device breakdown voltage of semiconductor device | Shunichi Hiraki, Akihiko Osawa | 1996-09-10 |
| 5321289 | Vertical MOSFET having trench covered with multilayer gate film | Satoshi Yanagiya, Noburo Matsuda, Shunichi Hiraki | 1994-06-14 |
| 5282018 | Power semiconductor device having gate structure in trench | Shunichi Hiraki | 1994-01-25 |
| 5250446 | Method of manufacturing a semiconductor device by forming at least three regions of different lifetimes of carriers at different depths | Akihiko Osawa, Mitsuhiko Kitagawa, Tetsujiro Tsunoda | 1993-10-05 |
| 5242845 | Method of production of vertical MOS transistor | Shunichi Hiraki, Akihiko Osawa, Satoshi Yanagiya | 1993-09-07 |
| 5126817 | Dielectrically isolated structure for use in soi-type semiconductor device | Yutaka Koshino, Akihiko Osawa, Kenji Yamawaki | 1992-06-30 |