TM

Takashi Mitsuhashi

KT Kabushiki Kaisha Toshiba: 11 patents #2,779 of 21,451Top 15%
D2 D2S: 10 patents #10 of 39Top 30%
CS Cadence Design Systems: 7 patents #204 of 2,263Top 10%
OC Ogura Clutch Co.: 6 patents #2 of 61Top 4%
Pioneer: 5 patents #362 of 1,730Top 25%
Fujitsu Limited: 3 patents #8,614 of 24,456Top 40%
LI Lixil: 2 patents #49 of 168Top 30%
Overall (All Time): #66,893 of 4,157,543Top 2%
44
Patents All Time

Issued Patents All Time

Showing 26–44 of 44 patents

Patent #TitleCo-InventorsDate
7759026 Method and system for manufacturing a reticle using character projection particle beam lithography Akira Fujimura, Lance Glasser, Kazuyuki Hagiwara 2010-07-20
7747977 Method and system for stencil design for particle beam writing Dmitri Lapanik, Shohei Matsushita, Zhigang Wu 2010-06-29
7745078 Method and system for manufacturing a reticle using character projection lithography Akira Fujimura, Lance Glasser, Kazuyuki Hagiwara 2010-06-29
7579606 Method and system for logic design for cell projection particle beam lithography Kenji Yoshida, Shohei Matsushita, Akira Fujimura 2009-08-25
7013444 Layout design system, layout design method and layout design program of semiconductor integrated circuit, and method of manufacturing the same Mutsunori Igarashi 2006-03-14
6813756 Method of automatic layout design for LSI, mask set and semiconductor integrated circuit manufactured by automatic layout design method, and recording medium storing automatic layout design program Mutsunori Igarashi, Masami Murakata, Masaaki Yamada, Fumihiro Minami, Takashi Ishioka 2004-11-02
6763508 Layout design system, layout design method and layout design program of semiconductor integrated circuit, and method of manufacturing the same Mutsunori Igarashi 2004-07-13
6645842 Semiconductor integrated circuit device, semiconductor integrated circuit wiring method, and cell arranging method Mutsunori Igarashi, Masami Murakata, Masaaki Yamada, Fumihiro Minami, Toshihiro Akiyama +1 more 2003-11-11
6546540 Method of automatic layout design for LSI, mask set and semiconductor integrated circuit manufactured by automatic layout design method, and recording medium storing automatic layout design program Mutsunori Igarashi, Masami Murakata, Masaaki Yamada, Fumihiro Minami, Takashi Ishioka 2003-04-08
6436804 Semiconductor integrated circuit device, semiconductor integrated circuit wiring method, and cell arranging method Mutsunori Igarashi, Masami Murakata, Masaaki Yamada, Fumihiro Minami, Toshihiro Akiyama +1 more 2002-08-20
6324292 Speaker apparatus Hiroyuki Hamada 2001-11-27
6262487 Semiconductor integrated circuit device, semiconductor integrated circuit wiring method, and cell arranging method Mutsunori Igarashi, Masami Murakata, Masaaki Yamada, Fumihiro Minami, Toshihiro Akiyama +1 more 2001-07-17
6257518 Tension apparatus and tension system 2001-07-10
6186434 Tension apparatus 2001-02-13
5994922 Output buffer, semiconductor integrated circuit having output buffer and driving ability adjusting method for output buffer Takahiro Aoki 1999-11-30
5847966 Power estimation method for an integrated circuit using probability calculations Taku Uchino 1998-12-08
5714820 Magnetic coupling Sakae Takakusagi 1998-02-03
5404310 Method and apparatus for power-source wiring design of semiconductor integrated circuits 1995-04-04
5032890 Semiconductor integrated circuit with dummy patterns Yukihiro Ushiku 1991-07-16