Issued Patents All Time
Showing 1–22 of 22 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7539952 | Computer implemented design system, a computer implemented design method, a reticle set, and an integrated circuit | Atsushi Watanabe | 2009-05-26 |
| 7230554 | Noise suppression circuit, ASIC, navigation apparatus, communication circuit, and communication apparatus having the same | Hideki Takeuchi, Masami Murakata, Masaaki Yamada, Reiko Nojima, Takashi Ishioka | 2007-06-12 |
| 7127694 | Computer implemented design system, a computer implemented design method, a reticle set, and an integrated circuit | Atsushi Watanabe | 2006-10-24 |
| 7124389 | Automated wiring pattern layout method | Masaaki Yamada, Koji Hashimoto, Makoto Takashima, Atsuhiko Ikeuchi | 2006-10-17 |
| 7064691 | Noise suppression circuit, ASIC, navigation apparatus, communication circuit, and communication apparatus having the same | Hideki Takeuchi, Masami Murakata, Masaaki Yamada, Reiko Nojima, Takashi Ishioka | 2006-06-20 |
| 7013444 | Layout design system, layout design method and layout design program of semiconductor integrated circuit, and method of manufacturing the same | Takashi Mitsuhashi | 2006-03-14 |
| 6904572 | Method, apparatus and program for designing a semiconductor integrated circuit by adjusting loading of paths | — | 2005-06-07 |
| 6813756 | Method of automatic layout design for LSI, mask set and semiconductor integrated circuit manufactured by automatic layout design method, and recording medium storing automatic layout design program | Masami Murakata, Takashi Mitsuhashi, Masaaki Yamada, Fumihiro Minami, Takashi Ishioka | 2004-11-02 |
| 6792593 | Pattern correction method, apparatus, and program | Makoto Takashima, Atsuhiko Ikeuchi, Koji Hashimoto, Masaaki Yamada | 2004-09-14 |
| 6779167 | Automated wiring pattern layout method | Masaaki Yamada, Koji Hashimoto, Makoto Takashima, Atsuhiko Ikeuchi | 2004-08-17 |
| 6763508 | Layout design system, layout design method and layout design program of semiconductor integrated circuit, and method of manufacturing the same | Takashi Mitsuhashi | 2004-07-13 |
| 6683336 | SEMICONDUCTOR INTEGRATED CIRCUIT, SUPPLY METHOD FOR SUPPLYING MULTIPLE SUPPLY VOLTAGES IN SEMICONDUCTOR INTEGRATED CIRCUIT, AND RECORD MEDIUM FOR STORING PROGRAM OF SUPPLY METHOD FOR SUPPLYING MULTIPLE SUPPLY VOLTAGES IN SEMICONDUCTOR INTEGRATED CIRCUIT | Hiroshi Tanaka, Kimiyoshi Usami, Takashi Ishikawa, Masahiro Kanazawa, Chiharu Mizuno | 2004-01-27 |
| 6645842 | Semiconductor integrated circuit device, semiconductor integrated circuit wiring method, and cell arranging method | Takashi Mitsuhashi, Masami Murakata, Masaaki Yamada, Fumihiro Minami, Toshihiro Akiyama +1 more | 2003-11-11 |
| 6546540 | Method of automatic layout design for LSI, mask set and semiconductor integrated circuit manufactured by automatic layout design method, and recording medium storing automatic layout design program | Masami Murakata, Takashi Mitsuhashi, Masaaki Yamada, Fumihiro Minami, Takashi Ishioka | 2003-04-08 |
| 6459331 | Noise suppression circuit, ASIC, navigation apparatus communication circuit, and communication apparatus having the same | Hideki Takeuchi, Masami Murakata, Masaaki Yamada, Reiko Nojima, Takashi Ishioka | 2002-10-01 |
| 6436804 | Semiconductor integrated circuit device, semiconductor integrated circuit wiring method, and cell arranging method | Takashi Mitsuhashi, Masami Murakata, Masaaki Yamada, Fumihiro Minami, Toshihiro Akiyama +1 more | 2002-08-20 |
| 6262487 | Semiconductor integrated circuit device, semiconductor integrated circuit wiring method, and cell arranging method | Takashi Mitsuhashi, Masami Murakata, Masaaki Yamada, Fumihiro Minami, Toshihiro Akiyama +1 more | 2001-07-17 |
| 6097043 | Semiconductor integrated circuit and supply method for supplying multiple supply voltages in a semiconductor integrated circuit | Hiroshi Tanaka, Kimiyoshi Usami, Takashi Ishikawa, Masahiro Kanazawa, Chiharu Mizuno | 2000-08-01 |
| 5986961 | Semiconductor integrated circuit of low power consumption type | — | 1999-11-16 |
| 5801960 | Layout method of wiring pattern for semiconductor integrated circuit | Midori Takano, Fumihiro Minami | 1998-09-01 |
| 5397749 | Method for arranging logical cells in a semiconductor integrated circuit | — | 1995-03-14 |
| 5224057 | Arrangement method for logic cells in semiconductor IC device | Kaori Kora | 1993-06-29 |