ZD

Zhong Dong

PT Promos Technologies: 10 patents #8 of 311Top 3%
PP Promos Technologies Pte.: 5 patents #2 of 24Top 9%
CM Chartered Semiconductor Manufacturing: 4 patents #148 of 840Top 20%
SC Shanghai Bilibili Technology Co.: 1 patents #70 of 198Top 40%
Overall (All Time): #201,885 of 4,157,543Top 5%
21
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12309464 Graphics engine and graphics processing method applicable to player Chaoran Li, Hao Wang, Zhaozheng WANG 2025-05-20
9385252 Method for insulating aluminum backboard of photovoltaic Yuanzhun Gao, Songhua Xue, Xianghua Yang, Jialin Gong, Chao Yang +3 more 2016-07-05
8283733 Semiconductor devices with gate electrodes and with monocrystalline silicon regions that contain atoms of nitrogen and one or more of chlorine, bromine, sulfur, fluorine, or phosphorus Ching-Hwa Chen 2012-10-09
7910429 Method of forming ONO-type sidewall with reduced bird's beak Chuck Jang, Ching-Hwa Chen, Chunchieh Huang, Jin Ho Kim, Vei-Han Chan +4 more 2011-03-22
7851339 Method of repairing deep subsurface defects in a silicon substrate that includes diffusing negatively charged ions into the substrate from a sacrificial oxide layer Ching-Hwa Chen 2010-12-14
7807577 Fabrication of integrated circuits with isolation trenches Ching-Hwa Chen 2010-10-05
7737487 Nonvolatile memories with tunnel dielectric with chlorine Barbara Haselden 2010-06-15
7387972 Reducing nitrogen concentration with in-situ steam generation Chiliang Chen, Ching-Hwa Chen 2008-06-17
7323729 Methods for improving quality of high temperature oxide (HTO) formed from halogen-containing precursor and products thereof and apparatus therefor Chuck Jang, Chia-Shun Hsiao 2008-01-29
7297597 Method for simultaneously fabricating ONO-type memory cell, and gate dielectrics for associated high voltage write transistors and gate dielectrics for low voltage logic transistors by using ISSG Chuck Jang, Ching-Hwa Chen, Chia-Shun Hsiao 2007-11-20
7265015 Use of chlorine to fabricate trench dielectric in integrated circuits Tai-Peng Lee 2007-09-04
7229880 Precision creation of inter-gates insulator Chuck Jang, Chunchieh Huang 2007-06-12
7122415 Atomic layer deposition of interpoly oxides in a non-volatile memory device Chuck Jang, Vei-Han Chan, Ching-Hwa Chen 2006-10-17
7071127 Methods for improving quality of semiconductor oxide composition formed from halogen-containing precursor Chuck Jang, Chia-Shun Hsiao 2006-07-04
7001810 Floating gate nitridation Chuck Jang, Ching-Hwa Chen 2006-02-21
6893920 Method for forming a protective buffer layer for high temperature oxide processing Chuck Jang 2005-05-17
6849897 Transistor including SiON buffer layer Chuck Jang 2005-02-01
6534388 Method to reduce variation in LDD series resistance Wenhe Lin, Simon Chooi, Kin Leong Pey 2003-03-18
6524910 Method of forming dual thickness gate dielectric structures via use of silicon nitride layers Wenhe Lin, Kin Leong Pey, Mei Sheng Zhou, Simon Chooi 2003-02-25
6261976 Method of forming low pressure silicon oxynitride dielectrics having high reliability 2001-07-17
6187633 Method of manufacturing a gate structure for a semiconductor memory device with improved breakdown voltage and leakage rate Joe Hui, Anqing Zhang 2001-02-13