YK

Young Ouk Kim

IBM: 11 patents #9,995 of 70,183Top 15%
SH Sk Hynix: 8 patents #946 of 4,849Top 20%
CL Core Logic: 1 patents #19 of 53Top 40%
University of California: 1 patents #8,022 of 18,278Top 45%
Overall (All Time): #204,892 of 4,157,543Top 5%
21
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12119822 Signal generation circuit having minimum delay, semiconductor apparatus using the same, and signal generation method Gyu-tae Park 2024-10-15
11777474 Signal generation circuit having minimum delay, semiconductor apparatus using the same, and signal generation method Gyu-tae Park 2023-10-03
11496136 Clock generating circuit and a semiconductor system using the clock generating circuit Gyu-tae Park 2022-11-08
11483004 Delay circuit and a delay locked loop circuit using the same Gyu-tae Park 2022-10-25
11349457 Signal generation circuit having minimum delay, semiconductor apparatus using the same, and signal generation method Gyu-tae Park 2022-05-31
11264994 Delay circuit and a delay locked loop circuit using the same — 2022-03-01
11050413 Latched comparator, clock generation circuit and semiconductor apparatus relating to the latched comparator Gyu-tae Park 2021-06-29
11025255 Signal generation circuit synchronized with a clock signal and a semiconductor apparatus using the same — 2021-06-01
10152116 Systems and devices for recording and reproducing senses Deli Wang, Siarhei Vishniakou, Brian Wellington Lewis, Truong Nguyen, Wonha Kim 2018-12-11
8782617 Apparatus and method for translating open vector graphic application program interface — 2014-07-15
7687207 System for coloring a partially colored design in an alternating phase shift mask Ioana Graur, Mark A. Lavin, Lars Liebmann 2010-03-30
7378195 System for coloring a partially colored design in an alternating phase shift mask Ioana Graur, Mark A. Lavin, Lars Liebmann 2008-05-27
6795961 Priority coloring for VLSI designs Lars Liebmann, Carlos A. Fonseca, Ioana Graur 2004-09-21
6609245 Priority coloring for VLSI designs Lars Liebmann, Carlos A. Fonseca, Ioana Graur 2003-08-19
6243854 Method for selecting hierarchical interactions in a hierarchical shapes processor Mark A. Lavin, Robert T. Sayah, William F. Pokorny 2001-06-05
6066180 Automatic generation of phase shift masks using net coloring Mark A. Lavin, Lars Liebmann, Glenwood S. Weinert 2000-05-23
6057063 Phase shifted mask design system, phase shifted mask and VLSI circuit devices manufactured therewith Lars Liebmann, Ioana Graur, Mark A. Lavin, Alfred Wong 2000-05-02
5883813 Automatic generation of phase shift masks using net coloring Mark A. Lavin, Lars Liebmann, Glenwood S. Weinert 1999-03-16
5636133 Efficient generation of fill shapes for chips and packages Donald G. Chesebro, Mark A. Lavin, Daniel N. Maynard 1997-06-03
5629861 Nested maximum space computation and efficient generation of nested shape complementation — 1997-05-13
5481473 System and method for building interconnections in a hierarchical circuit design Philip J. Russell, Glenwood S. Weinert 1996-01-02