SC

Seungmoo Choi

AS Agere Systems: 7 patents #178 of 1,849Top 10%
AG Agere Systems Guardian: 7 patents #19 of 810Top 3%
AT AT&T: 4 patents #4,399 of 18,772Top 25%
Cypress Semiconductor: 4 patents #443 of 1,852Top 25%
SL Spansion Llc.: 2 patents #309 of 769Top 45%
Overall (All Time): #173,853 of 4,157,543Top 5%
24
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
10147877 Method of forming controllably conductive oxide Matthew S. Buynoski, Chakravarthy Gopalan, Dongxiang Liao, Christie R. K. Marrian 2018-12-04
9837469 Resistive memory array using P-I-N diode select device and methods of fabrication thereof Sameer Haddad 2017-12-05
9490126 Resistive memory array using P-I-N diode select device and methods of fabrication thereof Sameer Haddad 2016-11-08
9461247 Method of forming controllably conductive oxide Matthew S. Buynoski, Chakravarthy Gopalan, Dongxiang Liao, Christie R. K. Marrian 2016-10-04
8946020 Method of forming controllably conductive oxide Matthew S. Buynoski, Chakravarthy Gopalan, Dongxiang Liao, Christie R. K. Marrian 2015-02-03
7989328 Resistive memory array using P-I-N diode select device and methods of fabrication thereof Sameer Haddad 2011-08-02
7563669 Integrated circuit with a trench capacitor structure and method of manufacture Sailesh Chittipeddi 2009-07-21
6893806 Multiple purpose reticle layout for selective printing of test circuits Cheryl Anne Bollinger, William T. Cochran, Stephen Arlon Meisner, Daniel Mark Wroge, Gerard Zaneski 2005-05-17
6890827 Method of fabricating a silicon on insulator transistor structure for imbedded DRAM Sailesh Mansinh Merchant, Pradip K. Roy 2005-05-10
6762459 Method for fabricating MOS device with halo implanted region Donald Thomas Cwynar, Scott F. Shive, Timothy Edward Doyle, Felix Llevada 2004-07-13
6603168 Vertical DRAM device with channel access transistor and stacked storage capacitor and associated method — 2003-08-05
6586310 High resistivity film for 4T SRAM Amal Ma Hamad, Felix Llevada, Vivek Saxena, Paul Yih 2003-07-01
6503787 Device and method for forming semiconductor interconnections in an integrated circuit substrate — 2003-01-07
6483144 Semiconductor device having self-aligned contact and landing pad structure and method of forming same — 2002-11-19
6468899 Contactless local interconnect process utilizing self-aligned silicide — 2002-10-22
6376302 Method for forming a DRAM capacitor having a high dielectric constant dielectric and capacitor made thereby — 2002-04-23
6362054 Method for fabricating MOS device with halo implanted region Donald Thomas Cwynar, Scott F. Shive, Timothy Edward Doyle, Felix Llevada 2002-03-26
6340827 Diffusion barrier for use with high dielectric constant materials and electronic devices incorporating same Sailesh Mansinh Merchant, Pradip K. Roy 2002-01-22
6320244 Integrated circuit device having dual damascene capacitor Glenn B. Alers, Sailesh Mansinh Merchant, Pradip K. Roy 2001-11-20
6274409 Method for making a semiconductor device — 2001-08-14
6215158 Device and method for forming semiconductor interconnections in an integrated circuit substrate — 2001-04-10
6191001 Shallow trench isolation method Alan S. Chen, Donald Thomas Cwynar, Timothy Edward Doyle, Troy A. Giniecki 2001-02-20
6168991 DRAM capacitor including Cu plug and Ta barrier and method of forming Sailesh Mansinh Merchant, Pradip K. Roy 2001-01-02
6072210 Integrate DRAM cell having a DRAM capacitor and a transistor — 2000-06-06