| 8127192 |
Predicting lwarx and stwcx instructions in test pattern generation and simulation for processor design verification/validation in interrupt mode |
Divya S. Anvekar, Manoj Dusanapudi, Sunil Suresh Hatti, Shakti Kapoor, Bhavani Shringari Nanjundiah |
2012-02-28 |
| 8006221 |
System and method for testing multiple processor modes for processor design verification and validation |
Shubhodeep Roy Choudhury, Manoj Dusanapudi, Sunil Suresh Hatti, Shakti Kapoor, Sai Rupak Mohanan |
2011-08-23 |
| 7689886 |
System and method for predicting lwarx and stwcx instructions in test pattern generation and simulation for processor design verification and validation |
Divya S. Anvekar, Manoj Dusanapudi, Sunil Suresh Hatti, Shakti Kapoor, Bhavani Shringari Nanjundiah |
2010-03-30 |
| 7669083 |
System and method for re-shuffling test case instruction orders for processor design verification and validation |
Sandip Bag, Vinod Bussa, Shubhodeep Roy Choudhury, Manoj Dusanapudi, Sunil Suresh Hatti +3 more |
2010-02-23 |
| 7661023 |
System and method for verification of cache snoop logic and coherency between instruction & data caches for processor design verification and validation |
Shubhodeep Roy Choudhury, Manoj Dusanapudi, Sunil Suresh Hatti, Shakti Kapoor, Chakrapani Rayadurgam |
2010-02-09 |
