Vinod Bussa — 13 Patents at IBM

Vinod Bussa has been granted 13 US patents while listed as an inventor at IBM. The first was granted in 2010 and the most recent in March 2023. Vinod Bussa ranks #362,438 of 4,157,543 US inventors in our database (top 8.7%). Patent records list Vinod Bussa in Hyderabad, IN.

Patents per Year

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Showing 1–13 of 13 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
11604757	Processing data in memory using an FPGA	Preetham M. Lobo, Gaurav Sulagodu Venkatagiri, Siva Sundar A	2023-03-14	$10,014,000
11513983	Interrupt migration	Timothy J. Schimke, Jesse P. Arroyo, Prathima Kommineni	2022-11-29	$7,547,000
11188369	Interrupt virtualization	Jesse P. Arroyo, Prathima Kommineni, Timothy J. Schimke	2021-11-30	$2,996,000
10261917	Identifying stale entries in address translation cache	Manoj Dusanapudi, Shakti Kapoor	2019-04-16	$3,839,000
10169181	Efficient validation of transactional memory in a computer processor	Manoj Dusanapudi, Shakti Kapoor	2019-01-01
9892060	Identifying stale entries in address translation cache	Manoj Dusanapudi, Shakti Kapoor	2018-02-13	$2,196,000
9720845	Identifying stale entries in address translation cache	Manoj Dusanapudi, Shakti Kapoor	2017-08-01	$1,638,000
9697138	Identifying stale entries in address translation cache	Manoj Dusanapudi, Shakti Kapoor	2017-07-04
9594680	Identifying stale entries in address translation cache	Manoj Dusanapudi, Shakti Kapoor	2017-03-14	$3,628,000
8019566	System and method for efficiently testing cache congruence classes during processor design verification and validation	Shubhodeep Roy Choudhury, Manoj Dusanapudi, Sunil Suresh Hatti, Shakti Kapoor, Batchu Naga Venkata Satyanarayana	2011-09-13	$4,804,000
7966521	Light weight and high throughput test case generation methodology for testing cache/TLB intervention and diagnostics	Manoj Dusanapudi, Sunil Suresh Hatti, Shakti Kapoor	2011-06-21	$7,220,000
7669083	System and method for re-shuffling test case instruction orders for processor design verification and validation	Sampan Arora, Sandip Bag, Shubhodeep Roy Choudhury, Manoj Dusanapudi, Sunil Suresh Hatti +3 more	2010-02-23	$6,192,000
7647539	System and method of testing using test pattern re-execution in varying timing scenarios for processor design verification and validation	Manoj Dusanapudi, Sunil Suresh Hatti, Shakti Kapoor, Rahul Sharad Moharil, Bhavani Shringari Nanjundiah	2010-01-12	$8,801,000

Vinod Bussa — 13 Patents

Patents per Year

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