Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9268714 | Validation of cache locking using instruction fetch and execution | Lakshmi Sarath | 2016-02-23 |
| 9164928 | Validation of cache locking using instruction fetch and execution | Lakshmi Sarath | 2015-10-20 |
| 8099559 | System and method for generating fast instruction and data interrupts for processor design verification and validation | Shubhodeep Roy Choudhury, Manoj Dusanapudi, Sunil Suresh Hatti, Shakti Kapoor | 2012-01-17 |
| 7752499 | System and method for using resource pools and instruction pools for processor design verification and validation | Shubhodeep Roy Choudhury, Manoj Dusanapudi, Sunil Suresh Hatti, Shakti Kapoor | 2010-07-06 |
| 7739570 | System and method for increasing error checking performance by calculating CRC calculations after multiple test patterns for processor design verification and validation | Sandip Bag, Shubhodeep Roy Choudhury, Manoj Dusanapudi, Sunil Suresh Hatti, Shakti Kapoor | 2010-06-15 |
| 7647539 | System and method of testing using test pattern re-execution in varying timing scenarios for processor design verification and validation | Vinod Bussa, Manoj Dusanapudi, Sunil Suresh Hatti, Shakti Kapoor, Bhavani Shringari Nanjundiah | 2010-01-12 |