Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7797650 | System and method for testing SLB and TLB cells during processor design verification and validation | Manoj Dusanapudi, Sunil Suresh Hatti, Shakti Kapoor, Batchu Naga Venkata Satyanarayana | 2010-09-14 |
| 7739570 | System and method for increasing error checking performance by calculating CRC calculations after multiple test patterns for processor design verification and validation | Shubhodeep Roy Choudhury, Manoj Dusanapudi, Sunil Suresh Hatti, Shakti Kapoor, Rahul Sharad Moharil | 2010-06-15 |
| 7669083 | System and method for re-shuffling test case instruction orders for processor design verification and validation | Sampan Arora, Vinod Bussa, Shubhodeep Roy Choudhury, Manoj Dusanapudi, Sunil Suresh Hatti +3 more | 2010-02-23 |
| 7584394 | System and method for pseudo-random test pattern memory allocation for processor design verification and validation | Shubhodeep Roy Choudhury, Manoj Dusanapudi, Sunil Suresh Hatti, Shakti Kapoor, Bhavani Shringari Nanjundiah | 2009-09-01 |