Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10438979 | Method of fabricating fill factor enhancement for image sensor | — | 2019-10-08 |
| 10121806 | Fill factor enhancement for image sensor | — | 2018-11-06 |
| 6807107 | Semiconductor memory with shadow memory cell | William McGee, Bruce Gieseke | 2004-10-19 |
| 6798712 | Wordline latching in semiconductor memories | Bruce Gieseke, William McGee | 2004-09-28 |
| 6395606 | MOSFET with metal in gate for reduced gate resistance | Carl Robert Huster, Emi Ishida | 2002-05-28 |
| 6274501 | Formation of structure to accurately measure source/drain resistance | Concetta Riccobene | 2001-08-14 |
| 6096586 | MOS device with self-compensating V.sub.aT -implants | Geoffrey Choh-Fei Yeap | 2000-08-01 |
| 6080630 | Method for forming a MOS device with self-compensating V.sub.T -implants | Richard P. Rouse, Zoran Krivokapic | 2000-06-27 |
| 6015740 | Method of fabricating CMOS devices with ultra-shallow junctions and reduced drain area | — | 2000-01-18 |