Issued Patents All Time
Showing 25 most recent of 27 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9784038 | High-productivity drill bits | Jeff Hogan, Tushar Matkar | 2017-10-10 |
| 9384167 | Formal verification of booth multipliers | — | 2016-07-05 |
| 9280626 | Efficiently determining Boolean satisfiability with lazy constraints | Jason R. Baumgartner, Robert L. Kanzelman, Hari Mony | 2016-03-08 |
| 8589327 | Efficiently determining boolean satisfiability with lazy constraints | Jason R. Baumgartner, Robert L. Kanzelman, Hari Mony | 2013-11-19 |
| 8589837 | Constructing inductive counterexamples in a multi-algorithm verification framework | Jason R. Baumgartner, Robert L. Kanzelman, Hari Mony | 2013-11-19 |
| 8578311 | Method and system for optimal diameter bounding of designs with complex feed-forward components | Jason R. Baumgartner, Robert L. Kanzelman, Hari Mony | 2013-11-05 |
| 8566764 | Enhanced analysis of array-based netlists via phase abstraction | Jason R. Baumgartner, Hari Mony, Paul Joseph Roessler | 2013-10-22 |
| 8527922 | Method and system for optimal counterexample-guided proof-based abstraction | Jason R. Baumgartner, Robert L. Kanzelman, Hari Mony | 2013-09-03 |
| 8484591 | Enhancing redundancy removal with early merging | Jason R. Baumgartner, Robert L. Kanzelman, Hari Mony | 2013-07-09 |
| 8478574 | Tracking array data contents across three-valued read and write operations | Jason R. Baumgartner, Robert L. Kanzelman, Hari Mony | 2013-07-02 |
| 8473882 | Method and system for scalable reduction in registers with SAT-based resubstitution | Jason R. Baumgartner, Hari Mony, Viresh Paruthi | 2013-06-25 |
| 8418106 | Techniques for employing retiming and transient simplification on netlists that include memory arrays | Jason R. Baumgartner, Robert L. Kanzelman, Hari Mony | 2013-04-09 |
| 8418119 | Logical circuit netlist reduction and model simplification using simulation results containing symbolic values | Jason R. Baumgartner, Robert L. Kanzelman, Hari Mony | 2013-04-09 |
| 8418093 | Method and system for design simplification through implication-based analysis | Jason R. Baumgartner, Geert Janssen, Robert L. Kanzelman | 2013-04-09 |
| 8413091 | Enhancing redundancy removal with early merging | Jason R. Baumgartner, Robert L. Kanzelman, Hari Mony | 2013-04-02 |
| 8336016 | Eliminating, coalescing, or bypassing ports in memory array representations | Jason R. Baumgartner, Robert L. Kanzelman, Hari Mony | 2012-12-18 |
| 8327302 | Techniques for analysis of logic designs with transient logic | Jason R. Baumgartner, Robert L. Kanzelman, Hari Mony | 2012-12-04 |
| 8307313 | Minimizing memory array representations for enhanced synthesis and verification | Jason R. Baumgartner, Robert L. Kanzelman, Hari Mony | 2012-11-06 |
| 8291359 | Array concatenation in an integrated circuit design | Jason R. Baumgartner, Robert L. Kanzelman, Hari Mony | 2012-10-16 |
| 8245166 | Optimal correlated array abstraction | Jason R. Baumgartner, Robert L. Kanzelman, Hari Mony | 2012-08-14 |
| 8215449 | Muffler system for noise abatement and ice control | Tolulope Kayode Ajibola, Shakeel Khalfan | 2012-07-10 |
| 8201117 | Method for scalable derivation of an implication-based reachable state set overapproximation | Jason R. Baumgartner, Geert Janssen, Hari Mony | 2012-06-12 |
| 8201115 | Scalable reduction in registers with SAT-based resubstitution | Jason R. Baumgartner, Hari Mony, Viresh Paruthi | 2012-06-12 |
| 8181134 | Techniques for performing conditional sequential equivalence checking of an integrated circuit logic design | Jason R. Baumgartner, Hari Mony, Jun Sawada | 2012-05-15 |
| 8181131 | Enhanced analysis of array-based netlists via reparameterization | Jason R. Baumgartner, Robert L. Kanzelman, Hari Mony | 2012-05-15 |