LY

Leo Yuan

Oracle: 13 patents #827 of 14,854Top 6%
Lsi Logic: 1 patents #1,146 of 1,957Top 60%
TP Trilogy Computer Development Partners: 1 patents #8 of 25Top 35%
IBM: 1 patents #44,794 of 70,183Top 65%
Overall (All Time): #326,846 of 4,157,543Top 8%
15
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
7296104 Automated calibration of I/O over a multi-variable eye window Brian L. Smith, Jue Wu, Jyh-Ming Jong, Wai Fong, Prabhansu Chakrabarti 2007-11-13
7130340 Noise margin self-diagnostic receiver logic Jyh-Ming Jong 2006-10-31
6944692 Automated calibration of I/O over a multi-variable eye window Brian L. Smith, Jue Wu, Jyh-Ming Jong, Wai Fong, Prabhansu Chakrabarti 2005-09-13
6937680 Source synchronous receiver link initialization and input floating control by clock detection and DLL lock detection Wai Fong, Jyh-Ming Jong, Brian L. Smith, Prabhansu Chakrabarti 2005-08-30
6880118 System and method for testing operational transmissions of an integrated circuit Cecilia T. Chen, Jyh-Ming Jong, Wai Fong, Brian L. Smith 2005-04-12
6737892 Method and apparatus for detecting valid clock signals at a clock receiver circuit Jyh-Ming Jong, Chung-Hsiao R. Wu, Prabhansu Chakrabarti 2004-05-18
6542026 Apparatus for on-chip reference voltage generator for receivers in high speed single-ended data link Chung-Hsiao R. Wu, Jyh-Ming Jong, Prabhansu Chakrabarti 2003-04-01
6518792 Method and circuitry for a pre-emphasis scheme for single-ended center taped terminated high speed digital signaling Jyh-Ming Jong, Prabhansu Chakrabarti 2003-02-11
6516422 Computer system including multiple clock sources and failover switching Drew G. Doblar, Emrys J. Williams 2003-02-04
6504486 Dual voltage sense cell for input/output dynamic termination logic Jyh-Ming Jong, Derek Tsai 2003-01-07
6477205 Digital data transmission via multi-valued logic signals generated using multiple drive states each causing a different amount of current to flow through a termination resistor Drew G. Doblar 2002-11-05
6310489 Method to reduce wire-or glitch in high performance bus design to improve bus performance Christopher T. Cheng 2001-10-30
6239619 Method and apparatus for dynamic termination logic of data buses Chaim Amir, Derek Tsai, Drew G. Doblar, Jonathan E. Starr, Trung Nguyen 2001-05-29
4597029 Signal connection system for semiconductor chip Andrzej Kucharek, John C. Marshall, James Cheng Lee, Carlton G. Amdahl 1986-06-24
4553050 Transmission line terminator-decoupling capacitor chip for off-chip driver Irving Feinberg, Leon L. Wu 1985-11-12