| 6536022 |
Two pole coupling noise analysis model for submicron integrated circuit design verification |
Kathirgamar Aingaran, Edgardo F. Klass, Chin Kim |
2003-03-18 |
| 6463574 |
Apparatus and method for inserting repeaters into a complex integrated circuit |
Julian Culetu |
2002-10-08 |
| 6265923 |
Dual rail dynamic flip-flop with single evaluation path |
Gin Yee |
2001-07-24 |
| 6239619 |
Method and apparatus for dynamic termination logic of data buses |
Leo Yuan, Derek Tsai, Drew G. Doblar, Jonathan E. Starr, Trung Nguyen |
2001-05-29 |
| 6222404 |
Edge-triggered dual-rail dynamic flip-flop with an enhanced self-shut-off mechanism |
Anup S. Mehta, Edgardo F. Klass, Ashutosh Kumar Das |
2001-04-24 |
| 6188259 |
Self-reset flip-flop with self shut-off mechanism |
Heip P. Ngo |
2001-02-13 |
| 6121807 |
Single phase edge-triggered dual-rail dynamic flip-flop |
Edgardo F. Klass |
2000-09-19 |
| 6043696 |
Method for implementing a single phase edge-triggered dual-rail dynamic flip-flop |
Edgardo F. Klass |
2000-03-28 |
| 6018254 |
Non-blocking delayed clocking system for domino logic |
Alan C. Rogers, Edgardo F. Klass, Jason M. Hart |
2000-01-25 |
| 5983013 |
Method for generating non-blocking delayed clocking signals for domino logic |
Alan C. Rogers, Edgardo F. Klass, Jason M. Hart |
1999-11-09 |
| 5920218 |
Single-phase edge-triggered dual-rail dynamic flip-flop |
Edgardo F. Klass |
1999-07-06 |
| 5889417 |
Apparatus and method for improving the noise immunity of a dynamic logic signal repeater |
Edgardo F. Klass, David Wilson Poole, Alan C. Rogers |
1999-03-30 |
| 5825224 |
Edge-triggered dual-rail dynamic flip-flop with self-shut-off mechanism |
Edgardo F. Klass, David Wilson Poole, Raymond A. Heald |
1998-10-20 |
