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Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Ashutosh Kumar Das — 26 Patents

SISmart Iops: 14 patents #1 of 6Top 20%
Oracle: 3 patents #4,054 of 14,854Top 30%
HSHitachi Data Systems: 2 patents #17 of 60Top 30%
RSRakuten Symphony: 1 patents #56 of 158Top 40%
Overall (All Time): #150,017 of 4,157,543Top 4%
26 Patents All Time
Ashutosh Kumar Das has been granted 26 US patents while listed as an inventor at Smart Iops. The first was granted in 1999 and the most recent in December 2025. Ashutosh Kumar Das ranks #150,017 of 4,157,543 US inventors in our database (top 3.6%). Patent records list Ashutosh Kumar Das in Indore, CA, IN.

Patents per Year

Patents granted per year, 1999 to 2025Bar chart with a peak of 4 patents in 2022.peak 41999: 1 patents19992001: 1 patents2002: 1 patents20022010: 1 patents2012: 2 patents20122015: 1 patents2017: 1 patents20172018: 1 patents2019: 1 patents20192020: 1 patents2021: 3 patents20212022: 4 patents2023: 1 patents20232024: 4 patents2025: 3 patents2025

Issued Patents All Time

Showing 1–25 of 26 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12490218 Self-organizing network cell registration and mismatch resolution method and apparatus Rahul Gupta, Aaditya DHARAMPURIKAR, Ankita Mahajan, Akash Gupta 2025-12-02
12341657 Automating provisioning of configuration templates Aaditya DHARAMPURIKAR, Rahul Gupta, Abhishek Singh, Biplav KUMAR 2025-06-24
12189944 Devices and systems having a protocol-independent interface supporting a plurality of data protocols, and methods related thereto Manuel Antonio D'Abreu 2025-01-07
12164435 Devices, systems, and methods of logical-to-physical address mapping Manuel Antonio D'Abreu 2024-12-10
11977781 Systems and methods for managing thermal dissipation in multi-stacked dies Manuel Antonio D'Abreu 2024-05-07
11907127 Devices, systems, and methods for configuring a storage device with cache Manuel Antonio D'Abreu 2024-02-20
11907114 Devices, systems, and methods for dynamically remapping memory addresses Manuel Antonio D'Abreu 2024-02-20
11580030 Devices, systems, and methods of logical-to-physical address mapping Manuel Antonio D'Abreu 2023-02-14
11442667 Systems and methods for managing thermal dissipation in multi-stacked dies Manuel Antonio D'Abreu 2022-09-13
11354247 Devices, systems, and methods for configuring a storage device with cache Manuel Antonio D'Abreu 2022-06-07
11288017 Devices, systems, and methods for storing data using distributed control Manuel Antonio D'Abreu 2022-03-29
11243702 Devices, systems, and methods for reducing storage utilization with data deduplication Manuel Antonio D'Abreu 2022-02-08
11036404 Devices, systems, and methods for reconfiguring storage devices with applications Manuel Antonio D'Abreu 2021-06-15
10979358 Low-latency data packet distributor Kirankumar Muralidharan, Sathishkumar Udayanarayanan 2021-04-13
10977196 Communication interface control system Kirankumar Muralidharan, Sathishkumar Udayanarayanan 2021-04-13
10635339 Devices, systems, and methods for reducing storage utilization with data deduplication Manuel Antonio D'Abreu 2020-04-28
10394474 Devices, systems, and methods for reconfiguring storage devices with applications Manuel Antonio D'Abreu 2019-08-27
10026464 Devices, systems, and methods for increasing the usable life of a storage system by optimizing the energy of stored data Manuel Antonio D'Abreu 2018-07-17
9634668 Pipelining of clock guided logic using latches 2017-04-25
8954892 Flexible reporting on storage resources Greg L Pelts, Sanjeev SAHU 2015-02-10
8224630 Modeling computer applications and storage used thereby Greg L Pelts, Sanjeev SAHU 2012-07-17
8102189 Clock guided logic with reduced switching 2012-01-24
7724036 Clock guided logic with reduced switching 2010-05-25
6452423 Circuit for avoiding contention in one-hot or one-cold multiplexer designs Sridhar Narayanan 2002-09-17 $12,965,000
6222404 Edge-triggered dual-rail dynamic flip-flop with an enhanced self-shut-off mechanism Anup S. Mehta, Chaim Amir, Edgardo F. Klass 2001-04-24 $66,436,000