Issued Patents All Time
Showing 1–20 of 20 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12019406 | Using time-to-digital converters to delay signals with high accuracy and large range | Krishnan Balakrishnan | 2024-06-25 |
| 11526135 | Using time-to-digital converters to delay signals with high accuracy and large range | Krishnan Balakrishnan | 2022-12-13 |
| 11342926 | Synchronization of clock signals generated using output dividers | William J. Anker, Xue-Mei Gong | 2022-05-24 |
| 11245406 | Method for generation of independent clock signals from the same oscillator | Harihara Subramanian Ranganathan, Xue-Mei Gong, Nathan J. Shashoua, Srisai R. Seethamraju | 2022-02-08 |
| 11038521 | Spur and quantization noise cancellation for PLLS with non-linear phase detection | Aslamali A. Rafi, Srisai R. Seethamraju, Russell Croman | 2021-06-15 |
| 10951216 | Synchronization of clock signals generated using output dividers | William J. Anker, Xue-Mei Gong | 2021-03-16 |
| 10826507 | Fractional divider with error correction | Xue-Mei Gong | 2020-11-03 |
| 10819354 | Accurate and reliable digital PLL lock indicator | Kannanthodath V. Jayakumar | 2020-10-27 |
| 10727845 | Use of a virtual clock in a PLL to maintain a closed loop system | Krishnan Balakrishnan | 2020-07-28 |
| 10727844 | Reference clock frequency change handling in a phase-locked loop | Xue-Mei Gong, Krishnan Balakrishnan | 2020-07-28 |
| RE48130 | Method for switching master/slave timing in a 1000Base-T link without traffic disruption | Mandeep Singh Chadha, James A. McIntosh | 2020-07-28 |
| 10693475 | Gradual frequency transition with a frequency step | Xue-Mei Gong | 2020-06-23 |
| 10651862 | Locking a PLL to the nearest edge of the input clock when the input clock is divided down before use in the PLL | Krishnan Balakrishnan | 2020-05-12 |
| 10608649 | Relative frequency offset error and phase error detection for clocks | Kannanthodath V. Jayakumar | 2020-03-31 |
| 8923341 | Method for switching master/slave timing in a 1000BASE-T link without traffic disruption | Mandeep Singh Chadha, James A. McIntosh | 2014-12-30 |
| 8179901 | System and method for squelching a recovered clock in an ethernet network | Jason Christopher Rock | 2012-05-15 |
| 7542536 | Resampler for a bit pump and method of resampling a signal associated therewith | Nicholas R. van Bavel | 2009-06-02 |
| 6973146 | Resampler for a bit pump and method of resampling a signal associated therewith | Nicholas R. van Bavel | 2005-12-06 |
| 6970511 | Interpolator, a resampler employing the interpolator and method of interpolating a signal associated therewith | — | 2005-11-29 |
| 6055619 | Circuits, system, and methods for processing multiple data streams | Gregory Allen North, Douglas D. Gephardt, James D. Austin, Scott Haban, Thomas Saroshan David +1 more | 2000-04-25 |