MC

Mandeep Singh Chadha

AT AT&T: 2 patents #7,280 of 18,772Top 40%
CL Cirrus Logic: 2 patents #514 of 1,131Top 50%
AS Agere Systems: 1 patents #984 of 1,849Top 55%
CS Crystal Semiconductor: 1 patents #38 of 74Top 55%
MS Microsemi Storage Solutions: 1 patents #6 of 35Top 20%
VS Vitesse Semiconductor: 1 patents #46 of 124Top 40%
Overall (All Time): #563,874 of 4,157,543Top 15%
9
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
RE48130 Method for switching master/slave timing in a 1000Base-T link without traffic disruption James D. Barnette, James A. McIntosh 2020-07-28
8923341 Method for switching master/slave timing in a 1000BASE-T link without traffic disruption James D. Barnette, James A. McIntosh 2014-12-30
6983047 Echo canceling system for a bit pump and method of operating the same Shawn R. McCaslin, Mile Milisavljevic 2006-01-03
6894989 Separation circuit for an echo canceling system and method of operating the same Shawn R. McCaslin, Mile Milisavljevic 2005-05-17
6876699 Filter circuit for a bit pump and method of configuring the same Zhuo Fu, Shawn R. McCaslin, Nicholas R. van Bavel 2005-04-05
6604206 Reduced GMII with internal timing compensation Marty Pflum, Nicholas R. van Bavel 2003-08-05
6111529 Accurate gain calibration of analog to digital converters Prabir C. Maulik 2000-08-29
6091349 Noise management scheme for high-speed mixed-signal integrated circuits Prabir C. Maulik 2000-07-18
6088445 Adaptive filter system having mixed fixed point or floating point and block scale floating point operators Shawn R. McCaslin, John Camagna, Nariankadu D. Hemkumar 2000-07-11