Issued Patents All Time
Showing 1–20 of 20 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11342926 | Synchronization of clock signals generated using output dividers | James D. Barnette, William J. Anker | 2022-05-24 |
| 11245406 | Method for generation of independent clock signals from the same oscillator | Harihara Subramanian Ranganathan, James D. Barnette, Nathan J. Shashoua, Srisai R. Seethamraju | 2022-02-08 |
| 10951216 | Synchronization of clock signals generated using output dividers | James D. Barnette, William J. Anker | 2021-03-16 |
| 10826507 | Fractional divider with error correction | James D. Barnette | 2020-11-03 |
| 10727844 | Reference clock frequency change handling in a phase-locked loop | James D. Barnette, Krishnan Balakrishnan | 2020-07-28 |
| 10693475 | Gradual frequency transition with a frequency step | James D. Barnette | 2020-06-23 |
| 8994420 | Higher-order phase noise modulator to reduce spurs and quantization noise | Adam B. Eldredge | 2015-03-31 |
| 8736476 | Modified first-order noise-shaping dynamic-element-matching technique | Douglas F. Patorello | 2014-05-27 |
| 8692599 | Interpolative divider linearity enhancement techniques | Adam B. Eldredge, Susumu Hara | 2014-04-08 |
| 8671286 | Automatically switching power supply sources for a clock circuit | Wenjung Sheng, Shyam Somayajula | 2014-03-11 |
| 7593482 | Wireless communication system with hardware-based frequency burst detection | Jing Liang, Frederick Rush, Phillip Matthews, Gannavaram Diwakar Vishakhadatta | 2009-09-22 |
| 7400206 | Clock circuit with programmable load capacitors | Wenjung Sheng, Shyam Somayajula | 2008-07-15 |
| 7370214 | Automatically switching power supply sources for a clock circuit | Wenjung Sheng, Shyam Somayajula | 2008-05-06 |
| 7227484 | Startup apparatus and technique for a wireless system that uses time domain isolation | David O. Anderton, Jeffrey L. Yiin | 2007-06-05 |
| 6271780 | Gain ranging analog-to-digital converter with error correction | Ka Y. Leung, Eric J. Swanson | 2001-08-07 |
| 6266002 | 2nd order noise shaping dynamic element matching for multibit data converters | Eric C. Gaalaas, Mark A. Alexander | 2001-07-24 |
| 6057793 | Digital decimation filter and method for achieving fractional data rate reduction with minimal hardware or software overhead | Tim J. Dupuis, Jinghui Lu, Korhan Titizer | 2000-05-02 |
| 6011501 | Circuits, systems and methods for processing data in a one-bit format | John J. Paulos, Mark A. Alexander, Eric C. Gaalaas, Dylan Hester | 2000-01-04 |
| 5801652 | Pattern dependent noise reduction in a digital processing circuit utilizing image circuitry | — | 1998-09-01 |
| 5719572 | Digital signal processor with reduced pattern dependent noise | — | 1998-02-17 |