Issued Patents All Time
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11652150 | Charge trap evaluation method and semiconductor element | Kuniyuki Kakushima, Takuya Hoshii, Kazuo Tsutsui, Hiroshi Iwai, Taiki YAMAMOTO | 2023-05-16 |
| 11513149 | Method for evaluating electrical defect density of semiconductor layer, and semiconductor element | Kuniyuki Kakushima, Takuya Hoshii, Kazuo Tsutsui, Hiroshi Iwai, Taiki YAMAMOTO | 2022-11-29 |
| 10854751 | Semiconductor device having curved gate electrode aligned with curved side-wall insulating film and stress-introducing layer between channel region and source and drain regions | Satoru Mayuzumi | 2020-12-01 |
| 10535769 | Semiconductor device having curved gate electrode aligned with curved side-wall insulating film and stress-introducing layer between channel region and source and drain regions | Satoru Mayuzumi | 2020-01-14 |
| 10269961 | Semiconductor device having curved gate electrode aligned with curved side-wall insulating film and stress-introducing layer between channel region and source and drain regions | Satoru Mayuzumi | 2019-04-23 |
| 9947790 | Semiconductor device having curved gate electrode aligned with curved side-wall insulating film and stress-introducing layer between channel region and source and drain regions | Satoru Mayuzumi | 2018-04-17 |
| 9601622 | Semiconductor device having curved gate electrode aligned with curved side-wall insulating film and stress-introducing layer between channel region and source and drain regions | Satoru Mayuzumi | 2017-03-21 |
| 9343536 | Semiconductor device | Wataru Saito, Kazuo Tsutsui, Hiroshi Iwai, Kuniyuki Kakushima | 2016-05-17 |
| 9337305 | Semiconductor device having curved gate electrode aligned with curved side-wall insulating film and stress-introducing layer between channel region and source and drain regions | Satoru Mayuzumi | 2016-05-10 |
| 9153663 | Semiconductor device having a stress-inducing layer between channel region and source and drain regions | Satoru Mayuzumi | 2015-10-06 |
| 8384167 | Semiconductor device with field effect transistor and manufacturing method thereof | Yoshiaki Kikuchi | 2013-02-26 |
| 7830703 | Semiconductor device and manufacturing method thereof | Koichi Takeda, Masahiro Nomura, Kiyoshi Takeuchi, Shigeharu Yamagami, Risho Koh +3 more | 2010-11-09 |
| 7723808 | Semiconductor device and method of manufacturing semiconductor device | Yoshifumi Okuda | 2010-05-25 |
| 7719043 | Semiconductor device with fin-type field effect transistor and manufacturing method thereof. | Shigeharu Yamagami, Risho Koh, Kiyoshi Takeuchi, Masahiro Nomura, Koichi Takeda +3 more | 2010-05-18 |
| 7701018 | Semiconductor device and method for manufacturing same | Shigeharu Yamagami, Kiyoshi Takeuchi, Atsushi Ogura, Masayasu Tanaka, Masahiro Nomura +4 more | 2010-04-20 |
| 7612416 | Semiconductor device having a conductive portion below an interlayer insulating film and method for producing the same | Kiyoshi Takeuchi, Koichi Terashima, Shigeharu Yamagami, Atsushi Ogura, Masayasu Tanaka +4 more | 2009-11-03 |
| 6933569 | SOI MOSFET | Risho Koh, Shigeharu Yamagami, Jong-Wook Lee, Yukishige Saito, Atsushi Ogura +6 more | 2005-08-23 |
| 6916695 | Semiconductor device and method of manufacturing the same | Yukishige Saito | 2005-07-12 |
| 6483151 | Semiconductor device and method of manufacturing the same | Yukishige Saito | 2002-11-19 |
| 6121120 | Method for manufacturing semiconductor device capable of flattening surface of selectively-grown silicon layer | Toru Tatsumi | 2000-09-19 |
| 5593923 | Method of fabricating semiconductor device having refractory metal silicide layer on impurity region using damage implant and single step anneal | Tadahiko Horiuchi, Takashi Ishigami, Hiroyuki Nakamura, Tohru Mogami, Takemitsu Kunio +1 more | 1997-01-14 |