TK

Takemitsu Kunio

NE Nec: 1 patents #7,889 of 14,502Top 55%
Overall (All Time): #3,708,066 of 4,157,543Top 90%
1
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
5593923 Method of fabricating semiconductor device having refractory metal silicide layer on impurity region using damage implant and single step anneal Tadahiko Horiuchi, Takashi Ishigami, Hiroyuki Nakamura, Tohru Mogami, Hitoshi Wakabayashi +1 more 1997-01-14