Issued Patents All Time
Showing 25 most recent of 77 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12182576 | Executing a composite scalar-vector VLIW instruction having a repeat field | Bruce M. Fleischer, Thomas W. Fox, Arpith Chacko Jacob, Ravi Nair, Kevin O'Brien +1 more | 2024-12-31 |
| 10831504 | Processor with hybrid pipeline capable of operating in out-of-order and in-order modes | Miguel Comparan, Andrew D. Hilton, Brian M. Rogers, Robert A. Shearer, Ken V. Vu +1 more | 2020-11-10 |
| 10635490 | Optimization of application workflow in mobile embedded devices | Ramon Bertran Monfort, Pradip Bose, Alper Buyuktosunoglu, Chen-Yong Cher, William Jinho Song +3 more | 2020-04-28 |
| 10572263 | Executing a composite VLIW instruction having a scalar atom that indicates an iteration of execution | Bruce M. Fleischer, Thomas W. Fox, Arpith Chacko Jacob, Ravi Nair, Kevin O'Brien +1 more | 2020-02-25 |
| 10114652 | Processor with hybrid pipeline capable of operating in out-of-order and in-order modes | Miguel Comparan, Andrew D. Hilton, Brian M. Rogers, Robert A. Shearer, Ken V. Vu +1 more | 2018-10-30 |
| 10049061 | Active memory device gather, scatter, and filter | Bruce M. Fleischer, Thomas W. Fox, James Allan Kahle, Jaime Moreno, Ravi Nair | 2018-08-14 |
| 10007242 | Mechanism for controlling subset of devices | Thomas W. Fox, Ravi Nair, Bryan S. Rosenburg | 2018-06-26 |
| 9933844 | Clustering execution in a processing system to increase power savings | Pradip Bose, Alper Buyuktosunoglu, Augusto J. Vega | 2018-04-03 |
| 9928190 | High bandwidth low latency data exchange between processing elements | Bruce M. Fleischer, Thomas W. Fox, Ravi Nair | 2018-03-27 |
| 9921639 | Clustering execution in a processing system to increase power savings | Pradip Bose, Alper Buyuktosunoglu, Augusto J. Vega | 2018-03-20 |
| 9910802 | High bandwidth low latency data exchange between processing elements | Bruce M. Fleischer, Thomas W. Fox, Ravi Nair | 2018-03-06 |
| 9841926 | On-chip traffic prioritization in memory | Bruce M. Fleischer, Thomas W. Fox, Ravi Nair | 2017-12-12 |
| 9690555 | Optimization of application workflow in mobile embedded devices | Ramon Bertran Monfort, Pradip Bose, Alper Buyuktosunoglu, Chen-Yong Cher, William Jinho Song +3 more | 2017-06-27 |
| 9632778 | Gather/scatter of multiple data elements with packed loading/storing into /from a register file entry | Bruce M. Fleischer, Thomas W. Fox, Jaime Moreno, Ravi Nair, Daniel A. Prener | 2017-04-25 |
| 9632777 | Gather/scatter of multiple data elements with packed loading/storing into/from a register file entry | Bruce M. Fleischer, Thomas W. Fox, Jaime Moreno, Ravi Nair, Daniel A. Prener | 2017-04-25 |
| 9632560 | Delaying execution in a processor to increase power savings | Pradip Bose, Alper Buyuktosunoglu, Augusto J. Vega | 2017-04-25 |
| 9632559 | Delaying execution in a processor to increase power savings | Pradip Bose, Alper Buyuktosunoglu, Augusto J. Vega | 2017-04-25 |
| 9594724 | Vector register file | Bruce M. Fleischer, Thomas W. Fox, Ravi Nair | 2017-03-14 |
| 9582466 | Vector register file | Bruce M. Fleischer, Thomas W. Fox, Ravi Nair | 2017-02-28 |
| 9575756 | Predication in a vector processor | Bruce M. Fleischer, Thomas W. Fox, Ravi Nair | 2017-02-21 |
| 9575755 | Vector processing in an active memory device | Bruce M. Fleischer, Thomas W. Fox, Ravi Nair, Daniel A. Prener | 2017-02-21 |
| 9569211 | Predication in a vector processor | Bruce M. Fleischer, Thomas W. Fox, Ravi Nair | 2017-02-14 |
| 9535694 | Vector processing in an active memory device | Bruce M. Fleischer, Thomas W. Fox, Ravi Nair, Daniel A. Prener | 2017-01-03 |
| 9471136 | Predictively turning off a charge pump supplying voltage for overdriving gates of the power switch header in a microprocessor with power gating | Pradip Bose, Alper Buyuktosunoglu, Victor Zyuban | 2016-10-18 |
| 9423859 | Delaying execution in a processor to increase power savings | Pradip Bose, Alper Buyuktosunoglu, Augusto J. Vega | 2016-08-23 |