DB

Douglas Brisbin

NS National Semiconductor: 12 patents #138 of 2,238Top 7%
Overall (All Time): #422,598 of 4,157,543Top 15%
12
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
8471369 Method and apparatus for reducing plasma process induced damage in integrated circuits Heather McCulloh, Denis Finbarr O'Connell, Sergei Drizlikh 2013-06-25
8086979 Method for designing and manufacturing a PMOS device with drain junction breakdown point located for reduced drain breakdown voltage walk-in Andrew Strachan 2011-12-27
7718448 Method of monitoring process misalignment to reduce asymmetric device operation and improve the electrical and hot carrier performance of LDMOS transistor arrays Prasad Chaparala 2010-05-18
7645657 MOS transistor and method of forming the MOS transistor with a SiON etch stop layer that protects the transistor from PID and hot carrier degradation Prasad Chaparala, Denis Finbarr O'Connell, Heather McCulloh, Sergei Drizlikh 2010-01-12
7560348 Method for designing and manufacturing a PMOS device with drain junction breakdown point located for reduced drain breakdown voltage walk-in Andrew Strachan 2009-07-14
7214992 Multi-source, multi-gate MOS transistor with a drain region that is wider than the source regions Andy Strachan 2007-05-08
7180140 PMOS device with drain junction breakdown point located for reduced drain breakdown voltage walk-in and method for designing and manufacturing such device Andrew Strachan 2007-02-20
6946706 LDMOS transistor structure for improving hot carrier reliability David Tsuei, Alexander H. Owens, Andy Strachan 2005-09-20
6903979 Efficient method of PMOS stacked-gate memory cell programming utilizing feedback control of substrate current Yuri Mirgorodski, Vladislav Vashchenko, Peter J. Hopper 2005-06-07
6727547 Method and device for improving hot carrier reliability of an LDMOS transistor using drain ring over-drive bias Andy Strachan 2004-04-27
6566710 Power MOSFET cell with a crossed bar shaped body contact area Andy Strachan 2003-05-20
6548839 LDMOS transistor structure using a drain ring with a checkerboard pattern for improved hot carrier reliability Andrew Strachan 2003-04-15