Issued Patents All Time
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12388407 | Method for manufacturing acoustic devices with improved performance | Buu Q. Diep, Matthew Wasilik, John Belsick | 2025-08-12 |
| 12365979 | Piezoelectric bulk layers with tilted c-axis orientation and methods for making the same | Matthew Wasilik, Robert Kraft, John Belsick | 2025-07-22 |
| 12031949 | Preventing epoxy bleed-out for biosensor devices | Buu Q. Diep, John Belsick, Matthew Wasilik, Rio Rivas, Bang Nguyen | 2024-07-09 |
| 11990885 | Method for manufacturing acoustic devices with improved performance | Buu Q. Diep, Matthew Wasilik, John Belsick | 2024-05-21 |
| 11885007 | Piezoelectric bulk layers with tilted c-axis orientation and methods for making the same | Matthew Wasilik, Robert Kraft, John Belsick | 2024-01-30 |
| 11824511 | Method for manufacturing piezoelectric bulk layers with tilted c-axis orientation | Robert Kraft, John Belsick | 2023-11-21 |
| 11401601 | Piezoelectric bulk layers with tilted c-axis orientation and methods for making the same | Matthew Wasilik, Robert Kraft, John Belsick | 2022-08-02 |
| 11381212 | Piezoelectric bulk layers with tilted c-axis orientation and methods for making the same | Robert Kraft, John Belsick | 2022-07-05 |
| 9583397 | Source/drain terminal contact and method of forming same | Benjamin G. Moser, Sunit S. Mahajan, Domingo A. Ferrer Luppi | 2017-02-28 |
| 9117930 | Methods of forming stressed fin channel structures for FinFET semiconductor devices | Vimal Kamineni, Abner Bello, Abhijeet Paul, Robert J. Miller, William J. Taylor, Jr. | 2015-08-25 |
| 9076787 | Fabrication of nickel free silicide for semiconductor contact metallization | — | 2015-07-07 |
| 8975142 | FinFET channel stress using tungsten contacts in raised epitaxial source and drain | Abhijeet Paul, Abner Bello, Vimal Kamineni | 2015-03-10 |
| 8912057 | Fabrication of nickel free silicide for semiconductor contact metallization | — | 2014-12-16 |
| 8889500 | Methods of forming stressed fin channel structures for FinFET semiconductor devices | Vimal Kamineni, Abner Bello, Abhijeet Paul, Robert J. Miller, William J. Taylor, Jr. | 2014-11-18 |
| 8859368 | Semiconductor device incorporating a multi-function layer into gate stacks | — | 2014-10-14 |
| 8580686 | Silicidation and/or germanidation on SiGe or Ge by cosputtering Ni and Ge and using an intralayer for thermal stability | — | 2013-11-12 |