Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7904869 | Method of area compaction for integrated circuit layout design | Kathleen C. Yu, Scott D. Hector, Robert L. Maziasz, James E. Vasck | 2011-03-08 |
| 7183798 | Synchronous memory | Xiaojie He, Sajitha Wijesuriya, John Schadt | 2007-02-27 |
| 6653860 | Enhanced macrocell module having expandable product term sharing capability for use in high density CPLD architectures | Om P. Agrawal, Xiaojie He, Larry R. Metzger, Chong M. Lee | 2003-11-25 |
| 6348813 | Scalable architecture for high density CPLD's having two-level hierarchy of routing resources | Om P. Agrawal, Xiaojie He, Larry R. Metzger, Robert A. Simon, Kerry A. Ilgenstein | 2002-02-19 |
| 6184713 | Scalable architecture for high density CPLDS having two-level hierarchy of routing resources | Om P. Agrawal, Xiaojie He, Larry R. Metzger, Robert A. Simon, Kerry A. Ilgenstein | 2001-02-06 |
| 6150841 | Enhanced macrocell module for high density CPLD architectures | Om P. Agrawal, Xiaojie He, Chong M. Lee, Robert M. Balzli, Jr., Larry R. Metzger +1 more | 2000-11-21 |