Issued Patents All Time
Showing 1–18 of 18 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11056160 | Non-volatile memory with selectable hard write | Richard K. Eguchi, Jon S. Choy, Anirban Roy, Jacob T. Williams | 2021-07-06 |
| 9300296 | Level shifter circuit | Gilles J. Muller | 2016-03-29 |
| 8823445 | Systems and methods for controlling power in semiconductor circuits | Jon S. Choy | 2014-09-02 |
| 7301182 | Circuit layout for improved performance while preserving or improving density | Larry R. Metzger, Sunil Mehta | 2007-11-27 |
| 7242053 | EEPROM device with voltage-limiting charge pump circuit | Sunil Mehta | 2007-07-10 |
| 6846714 | Voltage limited EEPROM device and process for fabricating the device | Sunil Mehta | 2005-01-25 |
| 6348813 | Scalable architecture for high density CPLD's having two-level hierarchy of routing resources | Om P. Agrawal, Claudia A. Stanley, Xiaojie He, Larry R. Metzger, Robert A. Simon | 2002-02-19 |
| 6184713 | Scalable architecture for high density CPLDS having two-level hierarchy of routing resources | Om P. Agrawal, Claudia A. Stanley, Xiaojie He, Larry R. Metzger, Robert A. Simon | 2001-02-06 |
| 6150841 | Enhanced macrocell module for high density CPLD architectures | Om P. Agrawal, Claudia A. Stanley, Xiaojie He, Chong M. Lee, Robert M. Balzli, Jr. +1 more | 2000-11-21 |
| 6028446 | Flexible synchronous and asynchronous circuits for a very high density programmable logic device | Om P. Agrawal | 2000-02-22 |
| 5869981 | High density programmable logic device | Om P. Agrawal, George Landers, Nicholas A. Schmitz, Jerry D. Moench | 1999-02-09 |
| 5811986 | Flexible synchronous/asynchronous cell structure for a high density programmable logic device | Om P. Agrawal | 1998-09-22 |
| 5489857 | Flexible synchronous/asynchronous cell structure for a high density programmable logic device | Om P. Agrawal | 1996-02-06 |
| 5485104 | Logic allocator for a programmable logic device | Om P. Agrawal, Jerry D. Moench | 1996-01-16 |
| 5457409 | Architecture of a multiple array high density programmable logic device with a plurality of programmable switch matrices | Om P. Agrawal, Jerry D. Moench | 1995-10-10 |
| 5225719 | Family of multiple segmented programmable logic blocks interconnected by a high speed centralized switch matrix | Om P. Agrawal, George Landers, Nicholas A. Schmitz, Jerry D. Moench | 1993-07-06 |
| 5015884 | Multiple array high performance programmable logic device family | Om P. Agrawal, George Landers, Nicholas A. Schmitz, Jerry D. Moench | 1991-05-14 |
| 4963768 | Flexible, programmable cell array interconnected by a programmable switch matrix | Om P. Agrawal, Michael J. Wright, Jerry D. Moench, Arthur H. Khu | 1990-10-16 |