Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
KI

Kerry A. Ilgenstein — 18 Patents

AMD: 9 patents #1,480 of 9,280Top 20%
LSLattice Semiconductor: 6 patents #84 of 544Top 20%
FSFreeescale Semiconductor: 2 patents #1,335 of 3,767Top 40%
NUNxp Usa: 1 patents #1,089 of 2,066Top 55%
Austin, TX: #1,808 of 18,064 inventorsTop 15%
Texas: #7,913 of 125,132 inventorsTop 7%
Overall (All Time): #245,716 of 4,157,543Top 6%
18 Patents All Time
Kerry A. Ilgenstein has been granted 18 US patents while listed as an inventor at AMD. The first was granted in 1990 and the most recent in July 2021. Kerry A. Ilgenstein ranks #245,716 of 4,157,543 US inventors in our database (top 5.9%). Patent records list Kerry A. Ilgenstein in Austin, TX, US.

Patents per Year

Patents granted per year, 1990 to 2021Bar chart with a peak of 2 patents in 1996.peak 21990: 1 patents19901991: 1 patents1993: 1 patents19931995: 1 patents1996: 2 patents19961998: 1 patents1999: 1 patents19992000: 2 patents2001: 1 patents20012002: 1 patents2005: 1 patents20052007: 2 patents2014: 1 patents20142016: 1 patents2021: 1 patents2021

Issued Patents All Time

Showing 1–18 of 18 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
11056160 Non-volatile memory with selectable hard write Richard K. Eguchi, Jon S. Choy, Anirban Roy, Jacob T. Williams 2021-07-06 $16,455,000
9300296 Level shifter circuit Gilles J. Muller 2016-03-29
8823445 Systems and methods for controlling power in semiconductor circuits Jon S. Choy 2014-09-02 $6,304,000
7301182 Circuit layout for improved performance while preserving or improving density Larry R. Metzger, Sunil Mehta 2007-11-27 $1,552,000
7242053 EEPROM device with voltage-limiting charge pump circuit Sunil Mehta 2007-07-10 $3,003,000
6846714 Voltage limited EEPROM device and process for fabricating the device Sunil Mehta 2005-01-25 $2,668,000
6348813 Scalable architecture for high density CPLD's having two-level hierarchy of routing resources Om P. Agrawal, Claudia A. Stanley, Xiaojie He, Larry R. Metzger, Robert A. Simon 2002-02-19 $27,686,000
6184713 Scalable architecture for high density CPLDS having two-level hierarchy of routing resources Om P. Agrawal, Claudia A. Stanley, Xiaojie He, Larry R. Metzger, Robert A. Simon 2001-02-06 $41,940,000
6150841 Enhanced macrocell module for high density CPLD architectures Om P. Agrawal, Claudia A. Stanley, Xiaojie He, Chong M. Lee, Robert M. Balzli, Jr. +1 more 2000-11-21 $34,526,000
6028446 Flexible synchronous and asynchronous circuits for a very high density programmable logic device Om P. Agrawal 2000-02-22 $6,407,000
5869981 High density programmable logic device Om P. Agrawal, George Landers, Nicholas A. Schmitz, Jerry D. Moench 1999-02-09 $3,120,000
5811986 Flexible synchronous/asynchronous cell structure for a high density programmable logic device Om P. Agrawal 1998-09-22 $3,273,000
5489857 Flexible synchronous/asynchronous cell structure for a high density programmable logic device Om P. Agrawal 1996-02-06 $4,130,000
5485104 Logic allocator for a programmable logic device Om P. Agrawal, Jerry D. Moench 1996-01-16 $6,240,000
5457409 Architecture of a multiple array high density programmable logic device with a plurality of programmable switch matrices Om P. Agrawal, Jerry D. Moench 1995-10-10 $4,216,000
5225719 Family of multiple segmented programmable logic blocks interconnected by a high speed centralized switch matrix Om P. Agrawal, George Landers, Nicholas A. Schmitz, Jerry D. Moench 1993-07-06 $27,041,000
5015884 Multiple array high performance programmable logic device family Om P. Agrawal, George Landers, Nicholas A. Schmitz, Jerry D. Moench 1991-05-14 $4,455,000
4963768 Flexible, programmable cell array interconnected by a programmable switch matrix Om P. Agrawal, Michael J. Wright, Jerry D. Moench, Arthur H. Khu 1990-10-16 $1,736,000