Issued Patents All Time
Showing 1–18 of 18 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9928331 | Method and control device for circuit layout migration | Vladimir P. Rozenfeld, Mikhail Sotnikov | 2018-03-27 |
| 9293450 | Synthesis of complex cells | — | 2016-03-22 |
| 8978004 | Cell routability prioritization | Alexander Leonidovich Kerre, Vladimir P. Rozenfeld, Mikhail Sotnikov, Igor G. Topouzov | 2015-03-10 |
| 8762898 | Double patterning aware routing without stitching | — | 2014-06-24 |
| 8726218 | Transistor-level layout synthesis | Vladimir P. Rozenfeld, Iouri G. Smirnov, Alexander V. Zhuravlev | 2014-05-13 |
| 8612915 | Reducing leakage in standard cells | Savithri Sundareswaran | 2013-12-17 |
| 7904869 | Method of area compaction for integrated circuit layout design | Kathleen C. Yu, Scott D. Hector, Claudia A. Stanley, James E. Vasck | 2011-03-08 |
| 7721245 | System and method for electromigration tolerant cell synthesis | Vladimir P. Rozenfeld, Iouri G. Smirnov, Sergei V. Somov, Igor G. Topouzov, Lyudmila Zinchenko | 2010-05-18 |
| 7124385 | Method for automated transistor folding | Patrick Mcguinness, Andrei Vladimirovitch Zinchenko, Vladimir P. Rozenfeld, Michael Viacheslavovich Golikov, Alexander Marchenko | 2006-10-17 |
| 6209123 | Methods of placing transistors in a circuit layout and semiconductor device with automatically placed transistors | Mohankumar Guruswamy, Srilata Raman | 2001-03-27 |
| 6075934 | Method for optimizing contact pin placement in an integrated circuit | Venkata K. R. Chiluvuri, Mohankumar Guruswamy, Srilata Raman | 2000-06-13 |
| 6006024 | Method of routing an integrated circuit | Mohankumar Guruswamy, Daniel Dulitz, Andrea Fernandez, Srilata Raman | 1999-12-21 |
| 5984510 | Automatic synthesis of standard cell layouts | Mohan Guruswamy, Daniel Dulitz, Srilata Raman, Venkata K. R. Chiluvuri, Andrea Berens | 1999-11-16 |
| 5987086 | Automatic layout standard cell routing | Srilata Raman, Mohankumar Guruswamy, Daniel Dulitz, Venkata K. R. Chiluvuri | 1999-11-16 |
| 5901065 | Apparatus and method for automatically placing ties and connection elements within an integrated circuit | Mohan Guruswamy, Daniel Dulitz | 1999-05-04 |
| 5737236 | Apparatus and method for the automatic determination of a standard library height within an integrated circuit design | Mohankumar Guruswamy, Daniel Dulitz, David Theodore Blaauw, Larry G. Jones | 1998-04-07 |
| 5689432 | Integrated circuit design and manufacturing method and an apparatus for designing an integrated circuit in accordance with the method | David Theodore Blaauw, Joseph W. Norton, Larry G. Jones, Mohankumar Guruswamy | 1997-11-18 |
| 5666288 | Method and apparatus for designing an integrated circuit | Larry G. Jones, David Theodore Blaauw, Mohan Guruswamy | 1997-09-09 |