Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7124385 | Method for automated transistor folding | Patrick Mcguinness, Robert L. Maziasz, Andrei Vladimirovitch Zinchenko, Vladimir P. Rozenfeld, Michael Viacheslavovich Golikov | 2006-10-17 |
| 7086027 | Method and apparatus for constraint graph based layout compaction for integrated circuits | Venkata K. R. Chiluvuri, Mikhail Sotnikov | 2006-08-01 |
| 6564366 | Method for channel routing, and apparatus | Andrey P. Plis, Mikhail Sotnikov, Patrick Mcguinness | 2003-05-13 |
| 6477693 | Method for manufacturing and designing a wiring of a channel of an electronic device and electronic apparatus | Andrey P. Plis, Gopal Vijayan | 2002-11-05 |
| 6477692 | Method and apparatus for channel-routing of an electronic device | Andrey P. Plis, Eugene G. Shiro, Mikhail Sotnikov, Igor G. Topouzov, Patrick McGuiness | 2002-11-05 |
| 6434721 | Method and apparatus for constraint graph based layout compaction for integrated circuits | Venkata K. R. Chiluvuri, Mikhail Sotnikov | 2002-08-13 |
| 6412103 | Routing method removing cycles in vertical constraint graph | Andrey P. Plis, Vijayan Gopalakrishnan | 2002-06-25 |