Issued Patents All Time
Showing 25 most recent of 338 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11837285 | Bias temperature instability correction in memory arrays | Siddarth A. Krishnan | 2023-12-05 |
| 11672189 | Two-terminal reversibly switchable memory device | Darrell Rinerson, Wayne Kinney, Roy Lambertson, John Sanchez, Lawrence Schloss +2 more | 2023-06-06 |
| 11605426 | Retention drift correction in non-volatile memory arrays | — | 2023-03-14 |
| 11502249 | Memory element with a reactive metal layer | Steve Kuo-Ren Hsia, Wayne Kinney, Steven W. Longcor, Darrell Rinerson, John Sanchez +2 more | 2022-11-15 |
| 11443795 | SRAM with address dependent power usage | — | 2022-09-13 |
| 11398256 | Local bit lines and methods of selecting the same to access memory elements in cross-point arrays | Chang Hua Siau, Darrell Rinerson, Seow Fong Lim, Sri Rama Namala | 2022-07-26 |
| 11368919 | Feedback transmission techniques in coordinated clusters of transmission reception points | Piyush Gupta, Junyi Li | 2022-06-21 |
| 11166294 | Scheduling in repetitive RF environments | Juha Sirkka, Hetal Pathak, Onur Senel, Saravanan Balasubramani, Neil C. Carlson +3 more | 2021-11-02 |
| 11127458 | Non-uniform state spacing in multi-state memory element for low-power operation | Deepak Kamalanathan, Siddarth A. Krishnan, Fuxi Cai | 2021-09-21 |
| 11069386 | Circuits and techniques to compensate memory access signals for variations of parameters in multiple layers of memory | Seow Fong Lim, Chang Hua Siau | 2021-07-20 |
| 11063214 | Two-terminal reversibly switchable memory device | Darrell Rinerson, Wayne Kinney, Roy Lambertson, John Sanchez, Lawrence Schloss +2 more | 2021-07-13 |
| 11011226 | Access signal adjustment circuits and methods for memory cells in a cross-point array | Chang Hua Siau | 2021-05-18 |
| 10971227 | Preservation circuit and methods to maintain values representing data in one or more layers of memory | Robert Norman | 2021-04-06 |
| 10971224 | High voltage switching circuitry for a cross-point array | Chang Hua Siau | 2021-04-06 |
| 10904812 | Increasing reliability during multi-connectivity handovers | Vinay Joseph, Mehmet Yavuz, Mostafa KHOSHNEVISAN, Rajat Prakash, Peerapol Tinnakornsrisuphap | 2021-01-26 |
| 10885972 | SRAM with error correction in retention mode | Stephen James Sheafor | 2021-01-05 |
| 10833125 | Memory element with a reactive metal layer | Steve Kuo-Ren Hsia, Wayne Kinney, Steven W. Longcor, Darrell Rinerson, John Sanchez +2 more | 2020-11-10 |
| 10834661 | Multiple connectivity for high reliability | Vinay Joseph, Peerapol Tinnakornsrisuphap, Satashu Goel | 2020-11-10 |
| 10813054 | Feedback transmission techniques in coordinated clusters of transmission reception points | Piyush Gupta, Junyi Li | 2020-10-20 |
| 10694578 | Apparatus and methods for hand-in to a femto node | Andrei Dragos Radulescu, Vinay Chande, Jen Mei Chen, Farhad Meshkati, Sanjiv Nanda +4 more | 2020-06-23 |
| 10680171 | Two-terminal reversibly switchable memory device | Darrell Rinerson, Wayne Kinney, Roy Lambertson, John Sanchez, Lawrence Schloss +2 more | 2020-06-09 |
| 10672467 | High voltage switching circuitry for a cross-point array | Chang Hua Siau | 2020-06-02 |
| 10650870 | Circuits and techniques to compensate memory access signals for variations of parameters in multiple layers of memory | Seow Fong Lim, Chang Hua Siau | 2020-05-12 |
| 10629257 | SRAM with error correction in retention mode | Stephen James Sheafor | 2020-04-21 |
| 10622028 | Local bit lines and methods of selecting the same to access memory elements in cross-point arrays | Chang Hua Siau, Darrell Rinerson, Seow Fong Lim, Sri Rama Namala | 2020-04-14 |